ADRF6650 datasheet(32/61 Pages) AD

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ADRF6650

Data Sheet

Rev. A | Page 32 of 61

IF FREQUENCY (MHz)

100

200

300

400

500

600

100Ω

200Ω

Figure 58. IF Gain vs. IF Frequency for Various Loads

IF FREQUENCY (MHz)

100

150

200

250

300

350

400

500

450

100Ω

200Ω

Figure 59. OIP3 vs. IF Frequency for Various Loads

IF FREQUENCY (MHz)

100

120

106

156

206

256

306

356

406

456

HD2

HD3

100Ω

200Ω

Figure 60. HD2/HD3 vs. IF Frequency for Various Loads

As mentioned previously in this section, the IF outputs are

optimized for a load of 100 Ω; however, this may not be the

most readily available load impedance. As a result, load vs.

performance trade-offs must be considered. Use Figure 58

through Figure 60 as guides only; do not interpret them in the

absolute sense. The results are obtained for one chip under

nominal voltage and supply.

ADC INTERFACING

The integrated IF DVGA of the ADRF6650 provides variable

and sufficient drive capability for both buffered and unbuffered

ADCs. The DVGA also provides isolation between the sampling

edges of the ADC and the mixer core. As result, only a selective

band-pass filter is required when interfacing with an ADC.

The filter resides between the ADRF6650 and the ADC. The

band-pass filter eliminates all out-of-band signals that might

degrade the performance of the ADRF6650 and ADC pair. The

band-pass filter center and bandwidth are selected for the

specific application, that is, the topology, system requirements,

signal bandwidth, ADC type, and sampling rate. The type and

the order of the filter are chosen by taking into account the

trade-off between the amount of rejection required and the

insertion loss. In this section, a filter design is explained for a

band-pass sampling use case with a step by step analysis.

Band-pass sampling is a popular way of reconstructing the

information from the received signals, especially for wireless

communication standards with high dynamic range requirements.

Band-pass sampling relies on the idea that the sampling rate

required to completely represent an analog signal is twice the

highest frequency of signal bandwidth of interest. With this

fact, a signal at a high IF frequency can be reconstructed by

accurately placing the signal of interest to one of the Nyquist

zones. To better illustrate the idea, a case for IF center frequency

of 187.5 MHz with a signal bandwidth of 30 MHz is considered.

To place the signal bandwidth to the first Nyquist zone, a

sampling rate of 250 MSPS is adequate, which puts the center

frequency of the retrieved signal to 62.5 MHz. One important

consideration for the band-pass sampling is that all of the

Nyquist zones fold on top of each other, which reduces the

available dynamic range. To overcome excessive noise due to

folding, employ a sharp antialiasing filter between the

ADRF6650 and the ADC.

To determine a proper candidate for the ADC, consider the signal-

to-noise ratio (SNR)/spurious-free dynamic range (SFDR) and

analog input bandwidth requirements. The SNR/SFDR require-

ments are provided for a given input power. Considering a

standard LTE uplink signal with a peak-to-average power ratio

(PAPR) of 8 dB to 10 dB, the average input signal power is backed

off at least 10 dB from the full scale. The SNR/SFDR of the

ADC at the backed off level allows a dynamic range compatible

with the system requirements. The analog input specification, alter-

natively, must be able to cope with the high IF frequency signal

(centered at 187.5 MHz). With these requirements in mind, the

AD9694 14-bit, 500 MSPS ADC or the AD6684 135 MHz quad

IF receiver are proper candidates with an SNR of 68 dBFS and

SFDR of 97 dBFS at 10 dB back-off from full scale.

The IF center frequency of the received signal (187.5 MHz) is

on the second Nyquist zone for a sampling rate of 250 MSPS.

The antialiasing filter provides enough rejection on other

Nyquist zones so that inherent folding of the zones does not

degrade the SNR and SFDR of the ADC. Considering that there

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