ADRF6650 datasheet(52/61 Pages) AD

52 / 61 page

ADRF6650

Data Sheet

Rev. A | Page 52 of 61

Address: 0x120B, Reset: 0x01, Name: SYNTH

Enable Feedbac k Div ider

Pres c aler Selec t

1: Enable 2x Pres c aler.

0: Dis able 2x Pres c aler.

[ 7 :2 ] RES ERV ED

[ 0 ] EN _FBD IV ( R/W )

[ 1 ] P RE_S EL ( R/W )

Table 71. Bit Descriptions for SYNTH

Bits

Bit Name

Settings

Description

Reset

Access

[7:2]

RESERVED

Reserved.

0x0

PRE_SEL

Prescaler Select

0x0

R/W

Disable 2x Prescaler.

Enable 2x Prescaler.

EN_FBDIV

Enable Feedback Divider

0x1

R/W

Address: 0x120C, Reset: 0x03, Name: R_DIV

R Divider Word

[7] RESERVED

[6:0] R_DIV (R/W)

Table 72. Bit Descriptions for R_DIV

Bits

Bit Name

Settings

Description

Reset

Access

RESERVED

Reserved.

0x0

[6:0]

R_DIV

R Divider Word. Lower 8 bits of 10-bit reference R divider word.

0x3

R/W

Address: 0x120E, Reset: 0x04, Name: SYNTH_0

Reference Divide by 2

1: Reference Divide by 2 Enabled.

0: Reference Divide by 2 Dis abled.

Reference Doubler enable - Optionally

double-buffered

[7:4] RESERVED

[0] RDIV2_SEL (R/W)

[3] DOUBLER_EN (R/W)

[2:1] RESERVED

Table 73. Bit Descriptions for SYNTH_0

Bits

Bit Name

Settings

Description

Reset

Access

[7:4]

RESERVED

Reserved

0x0

DOUBLER_EN

Reference Doubler Enable, Optionally Double-Buffered

0x0

R/W

[2:1]

RESERVED

Reserved

0x2

R/W

RDIV2_SEL

Reference Divide by 2

0x0

R/W

Reference Divide by 2 Disabled

Reference Divide by 2 Enabled

ADRF6650 Datasheet(PDF) 52 Page - Analog Devices

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