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ADRF6650 Datasheet(PDF) 12 Page - Analog Devices

Part # ADRF6650
Description  Dual Downconverter with DVGA and PLL/VCO, 450 MHz to 2700 MHz
PDF  61 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADRF6650 Datasheet(HTML) 12 Page - Analog Devices

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ADRF6650
Data Sheet
Rev. A | Page 12 of 61
Pin No.
Mnemonic
Description
25
SDIO
SPI Data Input/Output (3-Wire Mode); Input Only (4-Wire Mode).
26
SDO
SPI Data Output (4-Wire Mode); Not Used (3-Wire Mode).
27
CS
SPI Chip Select (Active Low).
28
RST
Reset (Active Low).
29
DCL_BIAS
VCO Core Bias Decouple Output.
30
VTUNE
Tuning Voltage (VTUNE) Input.
31
EXT_LO_IN+
External LO Positive Input.
32
EXT_LO_IN−
External LO Negative Input.
33
VCCVCO_3V3
VCO 3.3 V Supply.
34
VCCDIV_3V3
LO Chain and Divider 3.3 V Supply.
35
VCCFBDIV_3V3
PLL Feedback Divider 3.3 V Supply.
36
VCCLO_MIX_3V3
LO Mixer Output Buffer 3.3 V Supply.
37
VCCLO_AUX_3V3
LO External Output Buffer 3.3 V Supply.
38
LO_OUT+
External LO Positive Output.
39
LO_OUT−
External LO Negative Output.
40
GND
Charge Pump GND.
41
CPOUT
Charge Pump Output.
42
VCCCP_3V3
Charge Pump 3.3 V Supply.
43
VCCPFD_3V3
PFD 3.3 V Supply.
44
VCCREF_3V3
Reference Input Buffer 3.3 V Supply.
45
REF_IN
Reference Input Buffer.
46
SPILDO_OUT_1V8
SPI 1.8 V LDO External Decouple Output.
47
SDMLDO_OUT_1V8
SDM 1.8 V LDO External Decouple Output.
48
VBAT_DIG_3V3
SPI and SDM LDO 3.3 V Supply.
49
RXA_ATT_CLK
Channel A VGA Serial Gain Control (Up/Down) Clock.
50
RXA_ATT_DATA
Channel A VGA Serial Gain Control (Up/Down) Data.
51
VCC_DVGA_A
Channel A DSA and VGA VCC.
52
IFOUT_A+
Channel A VGA Positive Output.
53
IFOUT_A−
Channel A VGA Negative Output.
54
VCPL_A
Channel A VGA Decouple Output.
55
MIX_PU_A−
Channel A Mixer Amplifier Negative Output Pull-Up.
56
MIX_PU_A+
Channel A Mixer Amplifier Positive Output Pull-Up.
EPAD
Exposed Pad. The exposed pad must be connected to a ground plane with low thermal impedance.



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