PCM1820 datasheet(27/120 Pages) TI

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TLV320ADCx120

INxP

INxM

GND

Line or

Microphon e

Sing le-end ed

Input

Figure 8-14. Single-Ended, DC-Coupled Input

Connection

GND

Line or

Microphon e

Sing le-end ed

Input

TLV320ADCx120

INxP

INxM

Figure 8-15. Single-Ended, AC-Coupled Input

Connection

The device allows for flexibility in choosing the typical input impedance on INxP or INxM from 2.5 kΩ (default),

10 kΩ, and 20 kΩ based on the input source impedance. The higher input impedance results in slightly higher

noise or lower dynamic range. Table 8-9 lists the configuration register settings for the input impedance for the

record channel.

Table 8-9. Input Impedance Selection for the Record Channel

P0_R60_D[3:2] : CH1_IMP[1:0]

CHANNEL 1 INPUT IMPEDANCE SELECTION

00 (default)

Channel 1 input impedance typical value is 2.5 kΩ on INxP or INxM

Channel 1 input impedance typical value is 10 kΩ on INxP or INxM

Channel 1 input impedance typical value is 20 kΩ on INxP or INxM

Reserved (do not use this setting)

Similarly, the input impedance selection setting for input channel 2 can be configured using the CH2_IMP[1:0]

(P0_R65_D[3:2]) register bits.

The value of the coupling capacitor in AC-coupled mode must be chosen so that the high-pass filter formed by

the coupling capacitor and the input impedance do not affect the signal content. Before proper recording can

begin, this coupling capacitor must be charged up to the common-mode voltage at power up. To enable quick

charging, the device has modes to speed up the charging of the coupling capacitor. The default value of the

quick-charge timing is set for a coupling capacitor up to 1 µF. However, if a higher-value capacitor is used in the

system, then the quick-charging timing can be increased by using the INCAP_QCHG (P0_R5_D[5:4]) register

bits. For best distortion performance, use the low-voltage coefficient capacitors for AC coupling.

The TLV320ADC3120 can also support a higher input common-mode tolerance at the expense of noise

performance by a few decibels. The device supports three different modes with different common-mode

tolerances, which can be configured using the CH1_INP_CM_TOL_CFG[1:0] (P0_R58_D[7:6]) register bits.

Table 8-10 lists the configuration register settings for the input impedance for the record channel.

Table 8-10. Common-Mode Tolerance Mode Selection for Record Channel

P0_R58_D[7:6] :

CH1_INP_CM_TOL_CFG[1:0]

CHANNEL 1 INPUT COMMON-MODE TOLERANCE

00 (default)

Channel 1 input common-mode tolerance of: AC-coupled input = 100 mVPP, DC-coupled

input = 2.82 VPP.

Channel 1 input common-mode tolerance of: AC/DC-coupled input = 1 VPP.

10 (high CMRR mode)

Channel 1 input common-mode tolerance of: AC/DC-coupled input = 0-AVDD (supported

only with an input impedance of 10 kΩ and 20 kΩ). For input impedance of 2.5 kΩ, the input

common-mode tolerance is 0.4 V to 2.6 V.

Reserved (do not use this setting)

Similarly, the common-mode tolerance setting for input channel 2 can be configured using the

CH2_INP_CM_TOL_CFG[1:0] (P0_R58_D[5:4]) register bits. See the Input Common Mode Tolerance and High

CMRR modes for TLV320ADCx120 Devices application report for further details.

www.ti.com

TLV320ADC3120

SBASA91A – DECEMBER 2020 – REVISED JUNE 2021

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