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LTC6948 Datasheet(PDF) 29 Page - Analog Devices

Part # LTC6948
Description  300MHz to 9GHz High Linearity I/Q Demodulator with Wideband IF Amplifier
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC6948 Datasheet(HTML) 29 Page - Analog Devices

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LTC5594
29
Rev A
For more information www.analog.com
APPENDIX
Table 10. Serial Port Register Bit Field Summary
BITS
FUNCTION
DESCRIPTION
VALID VALUES
DEFAULT
AMPCC[1:0]
IF Amplifier IM3 CC Adjust
Used to optimize the IF amplifier IM3.
0x00 to 0x03
0x02
AMPIC[1:0]
IF Amplifier IM3 IC Adjust
Used to optimize the IF amplifier IM3.
0x00 to 0x03
0x02
AMPG[2:0]
IF Amplifier Gain Adjust
Adjusts the amplifier gain from 8dB to 15dB.
0x00 to 0x07
0x06
BAND
LO Band Select
Selects which LO matching band is used. BAND = 1 for high band. BAND
= 0 for low band.
0, 1
1
CF1[5:0]
LO Matching Capacitor CF1
Controls the CF1 capacitor in the LO matching network.
0x00 to 0x1F
0x08
CF2[5:0]
LO Matching Capacitor CF2
Controls the CF2 capacitor in the LO matching network.
0x00 to 0x1F
0x03
CHIPID
Chip Identification Bits
Factory set to default value.
0x00 to 0x03
0x00
DCOI[7:0]
I-Channel DC Offset
Controls the I-channel DC offset over a range from –200mV to 200mV.
0x00 to 0xFF
0x80
DCOQ[7:0]
Q-Channel DC Offset
Controls the Q-channel DC offset over a range from –200mV to 200mV.
0x00 to 0xFF
0x80
EADJ
Enable Nonlinearity Adjust
Enables the nonlinearity adjustment circuitry if EADJ = 1.
0, 1
1
EAMP
Enable IF Amplifiers
Enables the IF amplifiers if EAMP = 1.
0, 1
1
EDC
Enable DC Offset Adjust
Enables the DC offset adjustment circuitry if EDC = 1.
0, 1
1
EDEM
Enable Demodulator
Enables the demodulator circuitry if EDEM = 1.
0, 1
1
GERR[5:0]
IQ Gain Error Adjust
Controls the IQ gain error over a range from –0.5dB to 0.5dB.
0x00 to 0x3F
0x20
HD2IX[7:0]
HD2 I-Channel X-Vector
Controls the I-channel HD2 X-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
HD2IY[7:0]
HD2 I-Channel Y-Vector
Controls the I-channel HD2 Y-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
HD2QX[7:0]
HD2 Q-Channel X-Vector
Controls the Q-channel HD2 X-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
HD2QY[7:0]
HD2 Q-Channel Y-Vector
Controls the Q-channel HD2 Y-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
HD3IX[7:0]
HD3 I-Channel X-Vector
Controls the I-channel HD3 X-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
HD3IY[7:0]
HD3 I-Channel Y-Vector
Controls the I-channel HD3 Y-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
HD3QX[7:0]
HD3 Q-Channel X-Vector
Controls the Q-channel HD3 X-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
HD3QY[7:0]
HD3 Q-Channel Y-Vector
Controls the Q-channel HD3 Y-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
IM2IX[7:0]
IM2 I-Channel X-Vector
Controls the I-channel IM2 X-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
IM2QX[7:0]
IM2 Q-Channel X-Vector
Controls the Q-channel IM2 X-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
IM3IX[7:0]
IM3 I-Channel X-Vector
Controls the I-channel IM3 X-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
IM3IY[7:0]
IM3 I-Channel Y-Vector
Controls the I-channel IM3 Y-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
IM3QX[7:0]
IM3 Q-Channel X-Vector
Controls the Q-channel IM3 X-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
IM3QY[7:0]
IM3 Q-Channel Y-Vector
Controls the Q-channel IM3 Y-vector adjustment if EADJ = 1.
0x00 to 0xFF
0x80
IP3CC[1:0]
RF Input IP3 CC Adjust
Used to optimize the RF input IP3.
0x00 to 0x03
0x02
IP3IC[2:0]
RF Input IP3 IC Adjust
Used to optimize the RF input IP3.
0x00 to 0x07
0x04
LF1[1:0]
LO Matching Inductor LF1
Controls the LF1 inductor in the LO matching network.
0x00 to 0x03
0x03
LVCM[2:0]
LO Bias Adjust
Used to optimize mixer IP3.
0x00 to 0x07
0x02
PHA[8:0]
IQ Phase Error Adjust
Controls the IQ phase error over a range from –2.5 Degrees to 2.5
Degrees.
0x000 to 0x1FF
0x100
SDO_MODE
SDO Readback Mode
Enables the SDO readback mode if SDO_MODE = 1.
0, 1
0
SRST
Soft Reset
Writing 1 to this bit resets all registers to their default values.
0, 1
0



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