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LTM4664 Datasheet(PDF) 49 Page - Analog Devices

Part # LTM4664
Description  30V to 58V Input, Dual 30A, Single 60A 關Module Regulator with Digital Power System Management
PDF  138 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4664 Datasheet(HTML) 49 Page - Analog Devices

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LTM4664A
49
Rev. 0
For more information www.analog.com
Global addressing provides a means of the PMBus master
to address all LTM4664A PSM devices on the bus. The
LTM4664A PSM global address is fixed 0x5A (7-bit) or
0xB4 (8-bit) and cannot be disabled. Commands sent to
the global address act the same as if PAGE is set to a
value of 0xFF. Commands sent are written to both chan-
nels simultaneously. Global command 0x5B (7-bit) or
0xB6 (8-bit) is paged and allows channel specific com-
mand of all LTM4664A PSM devices on the bus. Other LTC
device types may respond at one or both of these global
addresses. Reading from global addresses is strongly
discouraged.
Device addressing provides the standard means of the
PMBus master communicating with a single instance of
an LTM4664A PSM. The value of the device address is set
by a combination of the ASEL configuration pin and the
MFR_ ADDRESS command. When this addressing means
is used, the PAGE command determines the channel being
acted upon. Device addressing can be disabled by writing
a value of 0x80 to the MFR_ADDRESS.
Rail addressing provides a means for the bus master to
simultaneously communicate with all channels connected
together to produce a single output voltage (PolyPhase).
While similar to global addressing, the rail address can
be dynamically assigned with the paged MFR_RAIL_
ADDRESS command, allowing for any logical grouping of
channels that might be required for reliable system control.
Reading from rail addresses is also strongly discouraged.
All four means of PMBus addressing require the user to
employ disciplined planning to avoid addressing conflicts.
Communication to LTM4664A PSM devices at global and rail
addresses should be limited to command write operations.
RESPONSES TO VOUT AND IIN/IOUT FAULTS
VOUT OV and UV conditions are monitored by compara-
tors. The OV and UV limits are set in three ways:
n
As a Percentage of the VOUT if Using the Resistor
Configuration Pins
n
In NVM if Either Programmed at the Factory or Through
the GUI
n
By PMBus Command
The IIN and IOUT overcurrent monitors are performed by
ADC readings and calculations. Thus these values are
based on average currents and can have a time latency
of up to tCONVERT. The IOUT calculation accounts for the
DCR and their temperature coefficient. The input cur-
rent is equal to the voltage measured across the RSENSE
resistor divided by the resistors value as set with the
MFR_IIN_CAL_GAIN command. If this calculated input
current exceeds the IN_OC_WARN_LIMIT the ALERT pin
is pulled low and the IIN_OC_WARN bit is asserted in the
STATUS_INPUT command.
The digital processor within the LTM4664A PSM provides
the ability to ignore the fault, shut down and latch off or
shut down and retry indefinitely (hiccup). The retry inter-
val is set in MFR_RETRY_ DELAY and can be from 120ms
to 83.88 seconds in 1ms increments. The shutdown for
OV/UV and OC can be done immediately or after a user
selectable deglitch time.
Output Overvoltage Fault Response
A programmable overvoltage comparator (OV) guards
against transient overshoots as well as long-term over-
voltages at the output. In such cases, the top MOSFET
is turned off and the bottom MOSFET is turned on.
However, the reverse output current is monitored while
device is in OV fault. When it reaches the limit, both top
and bottom MOSFETs are turned off. The top and bot-
tom MOSFETs will keep their state until the overvoltage
condition is cleared regardless of the PMBus VOUT_OV_
FAULT_RESPONSE command byte value. This hardware
level fault response delay is typically 2µs from the over-
voltage condition to BG asserted high. Using the VOUT_
OV_FAULT_RESPONSE command, the user can select
any of the following behaviors:
n
OV Pull-Down Only (OV Cannot Be Ignored)
n
Shut Down (Stop Switching) Immediately—Latch Off
n
Shut Down Immediately—Retry Indefinitely at the Time
Interval Specified in MFR_RETRY_DELAY
Either the Latch Off or Retry fault responses can be
de-glitched in increments of (0-7) • 10µs. See Table 14.
DUAL 25A/30A PSM OPERATION



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