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LTM4664 Datasheet(PDF) 71 Page - Analog Devices

Part # LTM4664
Description  30V to 58V Input, Dual 30A, Single 60A 關Module Regulator with Digital Power System Management
PDF  138 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4664 Datasheet(HTML) 71 Page - Analog Devices

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LTM4664A
71
Rev. 0
For more information www.analog.com
CHECKING TRANSIENT RESPONSE
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, VOUT shifts by an
amount equal to ΔILOAD(ESR), where ESR is the effective
series resistance of COUT. ΔILOAD also begins to charge or
discharge COUT generating the feedback error signal that
forces the regulator to adapt to the current change and
return VOUT to its steady-state value. During this recov-
ery time VOUT can be monitored for excessive overshoot
or ringing, which would indicate a stability problem. The
availability of the COMP pin not only allows optimization
of control loop behavior but also provides a DC-coupled
and AC-filtered closed-loop response test point. The DC
step, rise time and settling at this test point truly reflects
the closed-loop response. Assuming a predominantly
second order system, phase margin and/or damping fac-
tor can be estimated using the percentage of overshoot
seen at this pin. The bandwidth can also be estimated by
examining the rise time at the pin. The COMP_Cna exter-
nal capacitor shown in the Typical Application circuit will
provide an adequate starting point for most applications.
The programmable parameters that affect loop gain are
the voltage range, bit[1] of the MFR_PWM_CONFIG com-
mand, the current range bit[7] of the MFR_PWM_MODE
command, the gm of the PWM channel amplifier bits [7:5]
of MFR_PWM_COMP, and the internal RCOMP compensa-
tion resistor, bits[4:0] of MFR_PWM_COMP. Be sure to
establish these settings prior to compensation calculation.
The COMP_Cna series internal RCOMPandexternalCCOMP_Cna
filter sets the dominant pole-zero loop compensation. The
internal RCOMP value can be modified (from 0Ω to 62kΩ)
using bits[4:0] of the MFR_PWM_ COMP command.
Adjust the value of RCOMPtooptimizetransientresponseonce
the final PCB layout is done and the particular CCOMP_bn filter
capacitor and output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the loop
gain and phase. An output current pulse of 20% to 80%
of full-load current having a rise time of 1µs to 10µs will
produce output voltage and COMP pin waveforms that will
give a sense of the overall loop stability without break-
ing the feedback loop. Placing a power MOSFET with a
resistor to ground directly across the output capacitor and
driving the gate with an appropriate signal generator is
a practical way to produce to a load step. The MOSFET
+ RSERIES will produce output currents approximately
equal to VOUT/RSERIES. RSERIES values from 0.1Ω to 2Ω
are valid depending on the current limit settings and the
programmed output voltage. The initial output voltage step
resulting from the step change in output current may not
be within the bandwidth of the feedback loop, so this signal
cannot be used to determine phase margin. This is why
it is better to look at the COMP pin signal which is in the
feedback loop and is the filtered and compensated control
loop response. The gain of the loop will be increased by
increasing RCOMP and the bandwidth of the loop will be
increased by decreasing CCOMP_Cna. If RCOMP is increased
by the same factor that CCOMP is decreased, the zero fre-
quency will be kept the same, thereby keeping the phase
shift the same in the most critical frequency range of the
feedback loop. The gain of the loop will be proportional to
the transconductance of the error amplifier which is set
using bits[7:5] of the MFR_PWM_COMP command. The
output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. A second, more severe tran-
sient is caused by switching in loads with large (>1µF)
supply bypass capacitors. The discharged bypass capac-
itors are effectively put in parallel with COUT, causing a
rapid drop in VOUT. No regulator can alter its delivery of
current quickly enough to prevent this sudden step change
in output voltage if the load switch resistance is low and
Figure 33. RCOMP Adjust
INCREASE RCOMP
FREQUENCY
4664A F33
GAIN
TYPE II COMPENSATION
DUAL 25A/30A PSM APPLICATIONS INFORMATION



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