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LTM4664 Datasheet(PDF) 27 Page - Analog Devices |
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LTM4664 Datasheet(HTML) 27 Page - Analog Devices |
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27 / 138 page ![]() LTM4664A 27 Rev. 0 For more information www.analog.com 4:1 DIVIDER OPERATION Figure 3. Stage 1 MOSFET Switching Waveforms VGS M1 M2 M3 M4 ~ 50% DUTY CYCLE PHASE 1 PHASE 2 PHASE 1 PHASE 2 4664A F03 TS 4:1 DIVIDER DESCRIPTION The LTM4664A incorporates a high performance 4:1 switched capacitor divider that divides down the input voltage by a factor of four over an input voltage range of 30V to 58V. This 4:1 divider then powers a dual 25A/30A PMBus compliant core power rails that can regulate from 0.5V to 1.5V at up to 25A, per channel—and from 0.5V to 1.2V at up to 30A per channel. The LTM4664A will convert this high input range down directly to the low output voltages. MAIN CONTROL The LTM4664A internal 4:1 divider utilizes two constant frequency, open loop switched capacitor/charge pump stages for high voltage step down. The conversion effi- ciency is very high at ~ 99% for stage 1, and ~98.6% effi- cient for stage 2. Refer to Figure 1 for the block diagram. In stage 1 steady state operation, the N-channel MOSFETs M1 and M3 are turned on and off in the same phase with around 50% duty cycle at a pre-programmed 100kHz switching frequency. The N-channel MOSFETs M2 and M4 are turned on and off complementary to MOSFETs M1 and M3. The gate drive waveforms are shown in Figure 3. During phase 1, M1 and M3 are on and the flying capaci- tor CFLY1 is in series with COUT1. During phase 2, M2 and M4 are on and CFLY1 is in parallel with COUT1. The VOUT1 voltage is always close to half of the top voltage at the drain of MOSFET M1 (refer to GND pin) and in steady state and it is not sensitive to variable loads due to the very low impedance at its output. Stage 2 operates exactly the same way, the N-channel MOSFETs M5 and M7 are turned on and off in the same phase with around 50% duty cycle at a pre-programmed 300kHz switching frequency. The N-channel MOSFETs M6 and M8 are turned on and off complementary to MOSFETs M5 and M7. The main input voltage rail is connected to VINS1, and VOUT1 is connected directly into the VINS2. The LTM4664A front end divider stages do not regulate the output voltage with a closed- loop feedback system. However, it stops switching when fault conditions occur, such as VOUT pin overvoltage or undervoltage, an overcurrent event, or an over tempera- ture protection event. The VOUT2 (VINS1/4) is connected to the VINS3_Cn which is the inputs to the dual 25A/30A PMBus channels. This will be discussed in more detail in the dual 25A/30A operation section. There is a secondary fault protection comparator circuit that can be used to monitor VOUT2 for over voltage. This will be discussed in more detail in the application section. The LTM4664A can operate over a 30V to 58V input range that does have abrupt input voltage changes that move quicker than a few milliseconds after reaching steady state. See the window comparator section. INTVCCS1,2/EXTVCCS1,2 POWER Power for the quad N-channel MOSFET drivers and most other internal circuitry is derived from the INTVCCSn pin. Normallyaninternal5.5VlinearregulatorsuppliesINTVCCS1,2 power from either VINS1 or VINS2 as indicated in Figure 1. Both of these input supplies have high input voltage, and increases power loss due to the LDO drop. An optional external voltage source on EXTVCCS1,2 pin enables a sec- ond 5.5V linear regulator and supplies INTVCCS1,2 power from the EXTVCCS1,2 pin. To enable this more efficient second regulator, VINS1,2 has to be higher than 7V and the EXTVCCS1,2 pin voltage has to be higher than 6.5V. Do not exceed 40V on the EXTVCCSn pin. Figure 1 shows the VOUT2 supply (12V) connected to both EXTVCCS1 and EXTVCCS2 to lower power loss in the LDO after startup. |
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