EM78459AM datasheet(33/62 Pages) EMC

33 / 62 page

EM78458/459

8-Bit Microcontroller with MASK ROM

Product Specification (V1.4) 05.27.2005

• 27

(This specification is subject to change without further notice)

interrupt is disabled, or branches out to the interrupt vector 008H if the global interrupt

is enabled.

RF, the interrupt status register that records the interrupt requests in the relative

flags/bits. IOCF0 is an interrupt mask register. The global interrupt is enabled by the

ENI instruction and is disabled by the DISI instruction. When one of the interrupts

(when enabled) occurs, the next instruction will be fetched from address 008H. Once in

the interrupt service routine, the source of an interrupt can be determined by polling the

flag bits in RF. The interrupt flag bit must be cleared by instructions before leaving the

interrupt service routine to avoid recursive interrupts.

The flag (except ICIF bit) in the Interrupt Status Register (RF) is set regardless of the

status of its mask bit or the execution of ENI. Note that the outcome of RF will be the

logic AND of RF and IOCF0 (refer to Fig. 11). The RETI instruction ends the interrupt

routine and enables the global interrupt (the execution of ENI).

When an interrupt is generated by the INT instruction (when enabled), the next

instruction will be fetched from address 001H.

Fig. 11 Interrupt Input Circuit

4.7

Analog-To-Digital Converter (ADC)

The analog-to-digital circuitry consists of an 8-bit analog multiplexer, three control

registers (ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90), one data register

(ADDATA/RA) and an ADC with 8-bit resolution. The functional block diagram of the

ADC is shown in Fig. 12. The analog reference voltage (Vref) and analog ground are

connected via separate input pins.

The ADC module utilizes successive approximation to convert the unknown analog

signal into a digital value. The result is fed to the ADDATA. Input channels are

EM78459AM Datasheet(PDF) 33 Page - ELAN Microelectronics Corp