+

Output

-

GNDx

GNDy

VCCx

Ry

VCCy

SDAx or

SCLx

+

Output

GNDx

GNDy

VCCx

Ry

VCCy

0 V

Side x, Side y VCCx,VCCy

Ry

1, 2

3.3 V, 3.3 V 95.3 Ω

2, 1

3.3 V, 3.3 V 953 Ω

or

SDAx or

SCLx

VCCx or

VCCy

Output

VCCx (UVLO+)

0 .9 V

t

UVLO

VCCy

0 V

VCCx

IN

OUT

See Note B

0 V

50

Input

Generator

(See Note A)

50%

50%

50%

50%

90%

10%

Copyright © 2016, Texas Instruments Incorporated

A.

50 Ω. At the input, 50 Ω resistor is required to terminate Input Generator signal. It is not needed in actual application.

ISO1640-Q1

SLLSFC3A – MARCH 2020 – REVISED DECEMBER 2021

www.ti.com

20

Submit Document Feedback

Copyright © 2021 Texas Instruments Incorporated

Product Folder Links: ISO1640-Q1