ISO1640 datasheet(23/45 Pages) TI

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8.4 Feature Description

The device enables a complete isolated I2C interface to be implemented within a small form factor having the

features listed in Table 8-1.

Table 8-1. Features List

PART NUMBER

CHANNEL DIRECTION

RATED ISOLATION(1)

MAXIMUM FREQUENCY

ISO1640-Q1

Bidirectional (SCL)

Bidirectional (SDA)

5000 VRMS (16DW) 7071 VPK

(16DW) 3000 VRMS (8D) 4242

VPK (8D)

1.7 MHz

(1)

See for detailed Isolation specifications.

8.4.1 Hot Swap

The ISO1640-Q1 includes Hot Swap circuitry on Side 2 of the isolator to prevent loading on the I2C bus lines

while VCC2 is either unpowered or in the process of being powered on. While VCC2 is below the UVLO

threshold, the ISO1640-Q1 bus lines will not load the bus to avoid disrupting or corrupting an active I2C bus.

If the isolator is plugged into a live backplane using a staggered connector, where VCC2 and GND2 make

connection first followed by the bus lines, the SDA and SCL lines are pre-charged to VCC2 / 2 to minimize the

current required to charge the parasitic capacitance of the device. Once the device is fully powered on, the

device bus pins become active providing bidirectional, isolated, SCL and SDA lines.

8.4.2 Protection Features

Features are integrated in the ISO1640-Q1 to help protect the device from high current events. Enhanced ESD

protection cells are designed on the I2C bus pins to support 10 kV HBM ESD on side 1 and 14 kV HBM ESD on

side 2. The I2C bus pins on side 2 are designed to withstand an unpowered IEC-ESD strike of 8 kV, improving

robustness and system reliability in hot swap applications. In addition to the improved ESD performance, a short

circuit protection circuit is included on side 2 to protect the bus pins (SDA2 and SCL2) against strong short

circuits of 5 ohms or less to VCC2.

Thermal shutdown is integrated in the ISO1640-Q1 to protect the device from high current events. If the

junction temperature of the device exceeds the thermal shutdown threshold of 190°C (typical), the device turns

off, disabling the I2C circuits and releasing the bus. The shutdown condition is cleared when the junction

temperature drops at least the thermal shutdown hysteresis temperature of 10°C (typical) below the thermal

shutdown temperature of the device.

8.5 Isolator Functional Principle

To isolate a bidirectional signal path (SDA or SCL), the ISO1640-Q1 internally splits a bidirectional line into two

unidirectional signal lines, each of which is isolated through a single-channel digital isolator. Each channel output

is made open-drain to comply with the open-drain technology of I2C. Side 1 of the ISO1640-Q1 connects to a

low-capacitance I2C node (up to 80 pF), while side 2 is designed for connecting to a fully loaded I2C bus with up

to 400 pF of capacitance.

C-out

40 mV

50 mV

SDA1

OL1

IHT1

ILT1

PU1

node

CC1

SDA1

GND1

PU2

bus

CC2

SDA2

GND2

VREF

ISO164x

Figure 8-2. SDA Channel Design and Voltage Levels at SDA1

www.ti.com

ISO1640-Q1

SLLSFC3A – MARCH 2020 – REVISED DECEMBER 2021

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ISO1640 Datasheet(PDF) 23 Page - Texas Instruments

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