MAX694CSLASHD datasheet(5/18 Pages) MAXIM

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NAME

FUNCTION

MAX690/

MAX692/

MAX694

MAX691/

MAX693/

MAX695

PFO

Output of the Power-Fail Comparator. It goes low when PFI is less than 1.3V. The

comparator is turned off and PFO goes low when VCC is below VBATT.

—

CE IN

CE Gating Circuit Input. Connect to GND or VOUT if not used.

—

CE OUT

CE OUT goes low only when CE IN is low and VCC is above the reset threshold (4.65V

for MAX691 and MAX695, 4.4V for MAX693). See Figure 6.

—

BATT ON

BATT ON goes high when VOUT is internally switched to the VBATT input. It goes low

when VOUT is internally switched to VCC. The output typically sinks 25mA and can

directly drive the base of an external PNP transistor to increase the output current

above the 50mA rating of VOUT.

—

LOW LINE

LOW LINE goes low when VCC falls below the reset threshold. It returns high as soon

as VCC rises above the reset threshold. See Figure 6, Reset Timing.

—

RESET

Active-High Output. It is the inverse of RESET.

—

OSC SEL

When OSC SEL is unconnected or driven high, the internal oscillator sets the reset time

delay and watchdog timeout period. When OSC SEL is low, the external oscillator input,

OSC IN, is enabled. OSC SEL has a 3µA internal pullup. See Table 1.

—

OSC IN

When OSC SEL is low, OSC IN can be driven by an external clock to adjust both the

reset delay and the watchdog timeout period. The timing can also be adjusted by

connecting and external oscillator to this pin. See Figure 8. When OSC SEL is high or

floating, OSC IN selects between fast and slow Watchdog timeout periods.

—

WDO

The Watchdog Output (WDO). WDO goes low if WDI remains either high or low for

longer than the watchdog timeout period. WDO is set high by the next transition at WDI.

If WDI is unconnected or at mid-supply, WDO remains high. WDO also goes high when

LOW LINE goes low.

MAX690–MAX695

Microprocessor Supervisory Circuits

www.maximintegrated.com

Maxim Integrated │ 5

Pin Description (continued)

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