MMPF0100 datasheet(37/137 Pages) NXP

37 / 137 page

NXP Semiconductors

PF0100

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

6.4.4.2.3

Programmable maximum current

The maximum current, ISWxMAX, of each buck regulator is programmable. This allows the use of smaller inductors where lower currents

are required. Programmability is accomplished by choosing the number of paralleled power stages in each regulator. The

SWx_PWRSTG[2:0] bits in Table 138. Extended Page 2, page 115 of the register map control the number of power stages. See Table 39

for the programmable options. Bit[0] must always be enabled to ensure the stage with the current sensor is chosen. The default setting,

SWx_PWRSTG[2:0] = 111, represents the highest maximum current. The current limit for each option is also scaled by the percentage

of power stages enabled.

Table 37. Optimum phasing

Frequencies

Optimum Phasing

1.0 MHz

2.0 MHz

0 °

180 °

1.0 MHz

4.0 MHz

0 °

180 °

2.0 MHz

4.0 MHz

0 °

180 °

1.0 MHz

2.0 MHz

4.0 MHz

0 °

90 °

Table 38. Regulator frequency configuration

SWxFREQ[1:0]

Frequency

1.0 MHz

2.0 MHz

4.0 MHz

Reserved

Table 39. Programmable current configuration

Regulators

Control bits

% of power stages enabled

Rated current (A)

SW1AB

SW1AB_PWRSTG[2:0]

ISW1ABMAX

40%

1.0

80%

2.0

60%

1.5

100%

2.5

SW1C

SW1C_PWRSTG[2:0]

ISW1CMAX

43%

0.9

58%

1.2

86%

1.7

100%

2.0

SW2

SW2_PWRSTG[2:0]

ISW2MAX

38%

0.75

75%

1.5

63%

1.25

100%

2.0

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