MMPF0100 datasheet(45/137 Pages) NXP

45 / 137 page

NXP Semiconductors

PF0100

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

6.4.4.3.5

SW1A/B/C external components

Table 51. Register SW1CMODE - ADDR 0x31

Name

Bit #

R/W

Default

Description

SW1CMODE

3:0

R/W

0x08

Sets the SW1C switching operation mode.

See Table 30 for all possible configurations.

UNUSED

–

0x00

unused

SW1COMODE

R/W

0x00

Set status of SW1C when in sleep mode

• 0 = OFF

• 1 = PFM

UNUSED

7:6

–

0x00

unused

Table 52. Register SW1CCONF - ADDR 0x32

Name

Bit #

R/W

Default

Description

SW1CILIM

R/W

0x00

SW1C current limit level selection

• 0 = High level current limit

• 1 = Low level current limit

UNUSED

R/W

0x00

unused

SW1CFREQ

3:2

R/W

0x00

SW1C switching frequency selector. See

Table 38.

SW1CPHASE

5:4

R/W

0x00

SW1C phase clock selection.See Table 36.

SW1CDVSSPEED

7:6

R/W

0x00

SW1C DVS speed selection. See Table 34.

Table 53. SW1A/B/C external component recommendations

Components

Description

Mode

A/B/C single

phase

A/B Single - C

independent mode

A/B Dual - C

independent mode

CINSW1A(44)

SW1A input capacitor

4.7

μF4.7 μF4.7 μF

CIN1AHF(44)

SW1A decoupling input capacitor

0.1

μF0.1 μF0.1 μF

CINSW1B(44)

SW1B input capacitor

4.7

μF4.7 μF4.7 μF

CIN1BHF(44)

SW1B decoupling input capacitor

0.1

μF0.1 μF0.1 μF

CINSW1C(44)

SW1C input capacitor

4.7

μF4.7 μF4.7 μF

CIN1CHF(44)

SW1C decoupling input capacitor

0.1

μF0.1 μF0.1 μF

COSW1AB(44)

SW1A/B output capacitor

6 x 22

μF2 x 22 μF

4 x 22

μF

COSW1C(44)

SW1C output capacitor

–

3 x 22

μF

3 x 22

μF

LSW1A

SW1A inductor

1.0

μH1.0 μH1.0 μH

LSW1B

SW1B inductor

–

1.0

μH

LSW1C

SW1C inductor

–

1.0

μH1.0 μH

Notes

44.

Use X5R or X7R capacitors.

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