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MMPF0100 Datasheet(PDF) 74 Page - NXP Semiconductors |
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MMPF0100 Datasheet(HTML) 74 Page - NXP Semiconductors |
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74 / 137 page ![]() 74 NXP Semiconductors PF0100 FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS 6.4.4.5.2 SW4 external components Table 84. Register SW4MODE - ADDR 0x4D Name Bit # R/W Default Description SW4MODE 3:0 R/W 0x08 Sets the SW4 switching operation mode. See Table 30 for all possible configurations. UNUSED 4 – 0x00 unused SW4OMODE 5 R/W 0x00 Set status of SW4 when in sleep mode • 0 = OFF • 1 = PFM UNUSED 7:6 – 0x00 unused Table 85. Register SW4CONF - ADDR 0x4E Name Bit # R/W Default Description SW4ILIM 0 R/W 0x00 SW4 current limit level selection • 0 = High level current limit • 1 = Low level current limit UNUSED 1 R/W 0x00 unused SW4FREQ 3:2 R/W 0x00 SW4 switching frequency selector. See Table 38. SW4PHASE 5:4 R/W 0x00 SW4 phase clock selection. See Table 36. SW4DVSSPEED 7:6 R/W 0x00 SW4 DVS speed selection. See Table 35. Table 86. SW4 external component requirements Components Description Values CINSW4(58) SW4 input capacitor 4.7 μF CIN4HF(58) SW4 decoupling input capacitor 0.1 μF COSW4(58) SW4 output capacitor 3 x 22 μF LSW4 SW4 inductor 1.0 μH Notes 58. Use X5R or X7R capacitors |
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