V50000007 datasheet(16/63 Pages) TOSHIBA

16 / 63 page

Pinning:

2,8,24,42,55

Supply volt ( VSS=0V )

54.

System clock 1

9,25,41,56

Supply volt ( VDD=3.3V )

17,..,10 Data output UV

36,52,58

Supply volt ( VSS=0V )

7,..,3;1;64;63

Data output Y

35,51,53,57,59

Supply volt ( VDD=3.3V )

Horz active video out

43,..,50

Data input Y

V-Sync out / Ext V-Sync

31,..,34;37,..,40 Data input UV

H-Sync out / Ext H-Sync

System reset.

Interlace signal vert deflection

H-Sync input

Crystal conn / System clock 2

V-Sync input

Crystal connection

Sync enable input

Clock output

I2C-Bus data line

Test input

I2C-Bus clock line

DDP3310:

It is the display and deflection processor. All the horizontal and vertical stages are driven by this IC.

The last controls such as contrast, brightness and saturation of the actual video signal, OSD and VGA are accomplished

by the blocks in DDP. Tube measurement and SVM controls are also managed by this IC.

Features:

Video processing

linear horizontal scaling (0.25 4)

non-linear horizontal scaling panoramavision

dynamic peaking

soft limiter (gamma correction)

color transient improvement

programmable RGB matrix

picture frame generator

two analog RGB/Fast-Blank inputs

Deflection processing

scan velocity modulation output

high-performance H/V deflection

EHT compensation for vertical / East/West

soft start/stop of H-Drive

vertical angle and bow

differential vertical output

vertical zoom via deflection

horizontal and vertical protection circuit

adjustable horizontal frequency for VGA/SVGA dis-play

Miscellaneous

selectable 4:1:1/ 4:2:2 YC r C b input

selectable 27/ 32-MHz line-locked clock input

crystal oscillator for horizontal protection

automatic picture tube adjustment (cutoff, white-drive)

single 5-V power supply

V50000007 Datasheet(PDF) 16 Page - Toshiba Semiconductor

V50000007 Datasheet(HTML) 16 Page - Toshiba Semiconductor

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