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G1421 Datasheet(PDF) 22 Page - Global Mixed-mode Technology Inc |
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G1421 Datasheet(HTML) 22 Page - Global Mixed-mode Technology Inc |
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22 / 24 page ![]() Ver: 1.6 Aug 04, 2005 TEL: 886-3-5788833 http://www.gmt.com.tw 22 G1421 Global Mixed-mode Technology Inc. HP-IN Mode Operation An internal weakly pull-up circuit is connected to HP-IN control pin (pin 17). When this pin is left un- connected or tied to VDD, HP-IN mode is activated, ignoring SE/ BTL setting. In normal SE/ BTL mode operations, this HP-IN pin should be tied to GND. In HP-IN mode, the linear amplifiers of LOUT+ (pin 3) /ROUT+ (pin 22) are still alive, the linear amplifier of ROUT- (pin 15) is deactivated, the linear amplifier of LOUT- (pin 10) supplies VDD/2 on this pin to cancel the dc offsets. (Please refer to Logical Truth Table and No DC CAP Application Circuit for detailed operation.) If connected VDD/2 on the LOUT- (pin 10) to the phone jacket, the dc offset can be eliminated without using coupling capacitors in headphone applications. By using HP-IN mode, cost and PCB space can be further minimized than traditional headphone applica- tions with coupling capacitors. The HP-IN configura- tion is shown on Figure D. Short circuit protection is implemented on LOUT- (pin10) to avoid the short-circuit damage caused by the sleeve of the phone jack connected to ground ac- cidentally during the module assembling. When short-circuit is detected, the linear amplifier of LOUT- (pin 10) will turn off for a period. After this period, it activates again. If the short circuit condition still exists, it will be turned off again. With this protection, the damage caused by larger dc short circuit current (from VDD/2 to GND) can be avoided. MUTE and SHUTDOWN Mode Operations G1421 implements the mute and shutdown mode operations to reduce supply current, IDD, to the ab- solute minimum level during nonuse periods for battery-power conservation. When the shutdown pin (pin 8) is pulled high, all linear amplifiers will be deactivated to mute the amplifier outputs. And G1421 enters an extra low current consumption state, IDD is smaller than 5µA. If pulling mute-in pin (pin 11) high, it will force the activated linear ampli- fier to supply the VDD/2 dc voltage on the output to mute the AC performance. In mute mode operation, the current consumption will be a little different be- tween BTL, SE and HP-IN modes. (SE < HP-IN < BTL) Typically, the supply current is about 2.5mA in BTL mute operation. Shutdown and Mute-In pins should never be left unconnected, this floating con- dition will cause the amplifier operations unpredict- able. Maximum Power Clampping Function G1421 supports the maximum output power clamping function to avoid damaging the speaker when the am- plifier output a power beyond the speaker tolerance. The Vol pin (pin 23) is weakly pull-low internally. If inputting a non-zero voltage (low boundary voltage) to the Vol pin, G1421 will generate a high boundary voltage which the difference between the VDD/2 and the high boundary voltage is the same as the differ- ence between the VDD/2 and the low boundary volt- age. ( i.e. VOH – VDD/2 = VDD/2 – VOL ) Then the out- puts of linear amplifiers will be effectively limited be- tween the high/low boundary voltage, the maximum output power is clamped. By setting the voltage of Vol, the maximum output power can be well controlled. When the maximum power clamping function is not used, the Vol pin should be floated or tied to GND. VDD Vo(PP)+VDD/2 VDD/2 Vo(PP) VDD/2 RL Figure D VDD Vo(PP)+VDD/2 VDD/2 Vo(PP) VDD/2 RL Figure D |
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