G1421 datasheet(23/24 Pages) GMT

23 / 24 page

Ver: 1.6

Aug 04, 2005

TEL: 886-3-5788833

http://www.gmt.com.tw

G1421

Global Mixed-mode Technology Inc.

Optimizing DEPOP Operation

Circuitry has been implemented in G1421 to mini-

mize the amount of popping heard at power-up and

when coming out of shutdown mode. Popping oc-

curs whenever a voltage step is applied to the

speaker and making the differential voltage gener-

ated at the two ends of the speaker. To avoid the

popping heard, the bypass capacitor should be

chosen promptly, 1/(CBx100kΩ) ≦ 1/(CI*(RI+RF)).

Where 100k

Ω is the output impedance of the

mid-rail generator, CB is the mid-rail bypass ca-

pacitor, CI is the input coupling capacitor, RI is the

input impedance, RF is the gain setting impedance

which is on the feedback path. CB is the most im-

portant capacitor. Besides it is used to reduce the

popping, CB can also determine the rate at which

the amplifier starts up during startup or recovery

from shutdown mode.

De-popping circuitry of G1421 is shown on Figure E.

The PNP transistor limits the voltage drop across

the 50k

Ω by slewing the internal node slowly when

power is applied. At start-up, the voltage at

BYPASS capacitor is 0. The PNP is ON to pull the

mid-point of the bias circuit down. So the capacitor

sees a lower effective voltage, and thus the charg-

ing is slower. This appears as a linear ramp (while

the PNP transistor is conducting), followed by the

expected exponential ramp of an R-C circuit.

Junction Temperature Measurement

Characterizing a PCB layout with respect to thermal

impedance is very difficult, as it is usually impossi-

ble to know the junction temperature of the IC.

G1421 TJ (pin 2) sources a current inversely pro-

portional to the junction temperature. Typically TJ

sources–120µA for a 5V supply at 25°C. And the

slope is approximately 0.22µA/°C. As the resistors

have a tolerance of ±20%, these values should be

calibrated on each device. When the temperature

sensing function is not used, TJ pin can be left

floating or tied to VDD to reduce the current con-

sumption.

Temperature sensing circuit is shown on Figure F.

Bypass

VDD

100 k

50 k

Figure E

Bypass

VDD

100 k

50 k

Figure E

VDD

Figure F

VDD

Figure F

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