MPC8540 datasheet(623/1302 Pages) FREESCALE

623 / 1302 page

Initialization/Application Information

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

13-119

and the DSP can exchange information through memory internal or external to the DSP and within

the address reach of the EHPI. The EHPI uses 23-bit addresses, where each address is assigned to

a 16-bit word in memory.

The EHPI has two modes, one for multiplexed address/data and one with separate buses.To allow

the connection of multiple DSPs and other peripherals on the local bus, the use of the EHPI

non-multiplexed mode is recommended. The EHPI uses the signals in Figure 13-48.

To achieve the timings required by the DSP host port and optimize the bus usage, the use of one

of the UPMs is recommended. Note that the DSP address signals reflect 16-bit addresses, whereas

local bus address signals reflect byte addresses. This essentially shifts address signals by one bit.

The EHPI host port’s two strobe pins, HDS1 and HDS2, allow different options to control

transfers. The UPM supports any of those options; however, the easiest is to use the single

active-low strobe mode and connect one UPM LGPL signal (whatever is available) to HDS.

Table 13-48. EHPI Signals

Signals

Type

Description

Connect With

HD[15:0]

I/O/Z Host data bus: Non-muxed mode: data only

LAD[0:15]

HA[19:4]

Host address bus: Non-muxed mode: addresses

Latched A[11:26]

HA[3:0]

Host address bus: lsbs

LA[27:30]

HBE[1:0]

Host byte-enable signals

00 Word, 0 MSB, 10 LSB, 11 Reserved

LBS[0:1]

HCS

Chip select signal

LCSn

HR/W

IR/W signal

LGPLy or inverted LBCTL

HDS1,

HDS2

Data strobe signals must be at least 2 DSP clocks wide

• Host has separate active-low read and write strobe pins: connect one

to HDS1, one to HDS2

• Host has one active-low strobe pin: connect to HDS1 or HDS2, the

other to 1

• Host has one active high-strobe pin: connect to HDS1 or HDS2, the

other to 0

LGPLn

HRDY

EHPI ready signal

LUPWAIT

HCNTL0

EHPI control signals. Non-muxed mode:

• HCNTL=1: access DSP data memory

• HCNTL=0: access EHPI control register

Application specific:

either GPIO pin or latched

address lines

HAS

Address strobe signal

HMODE

EHPI mode signal

High: non-muxed mode

Low: muxed mode

High

RST_MODE

Reset mode signal

HINT

DSP to host interrupt signal

INTn

MPC8540 Datasheet(PDF) 623 Page - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 623 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL