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MPC8540 Datasheet(PDF) 864 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 864 Page - Freescale Semiconductor, Inc |
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864 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 16-42 Freescale Semiconductor PCI/PCI-X Bus Interface 16.3.2.7 PCI Subclass Code Register—Offset 0x0A Table 16-32 describes the PCI subclass code register (PSCR). Figure 16-33. PCI Subclass Code Register 16.3.2.8 PCI Bus Base Class Code Register—Offset 0x0B Table 16-32 describes the PCI bus base class code register (PBCCR). Figure 16-34. PCI Bus Base Class Code Register Table 16-30. PCI Bus Programming Interface Register Field Description Bits Name Description 7–0 Programming Interface 0x00 When the PCI controller is configured as host bridge 0x01 When the PCI controller is configured as an agent device 7 0 R Subclass Code W Reset 0010_0000 Offset 0x0A Table 16-31. PCI Subclass Code Register Field Description Bits Name Description 7–0 Subclass Code PowerPC—0x20 7 0 R Base Class Code W Reset 0000_1011 Offset 0x0B Table 16-32. PCI Bus Base Class Code Register Field Description Bits Name Description 7–0 Base Class Code Processor—0x0B |
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