| Electronic Components Datasheet Search |
|
MPC8540 Datasheet(PDF) 892 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC8540 Datasheet(HTML) 892 Page - Freescale Semiconductor, Inc |
|
892 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 16-70 Freescale Semiconductor PCI/PCI-X Bus Interface Figure 16-63. DAC Burst Write Example Figure 16-64 shows the timing sequence of the PCI signals for 64-bit DAC reads. Figure 16-64. 64-Bit Dual Address Read Cycle 16.4.2.11 Configuration Cycles This section describes PCI configuration cycles used for configuring standard PCI devices. The PCI configuration space of any device is intended for configuration, initialization, and catastrophic error-handling functions only. Access to the PCI configuration space should be limited to initialization and error-handling software. PCI_CLK T/A T/A DATA1 DATA2 DATA3 DATA4 BE1 BE2 BE4 Cmd PCI_FRAME PCI_IRDY PCI_DEVSEL PCI_C/BE[3:0] PCI_AD[31:0] PCI_TRDY BE3 Lo-Addr Hi-Addr 0x0D PCI_CLK PCI_FRAME PCI_AD[31:0] PCI_C/BE[3:0] PCI_IRDY PCI_TRDY 1234 5 6 789 PCI_DEVSEL LO-ADDR HI-ADDR DUAL AD BUS CMD BE[3:0] PCI_AD[63:32] HI-ADDR DATA1 DATA3(2) DATA2 DATA4 BUS CMD BE[7:4] PCI_C/BE[7:4] (optional) Address phase Data phase Data phase Data transfer Wait Data transfer Wait FM S |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |