MPC8540 datasheet(918/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

16-96

Freescale Semiconductor

PCI/PCI-X Bus Interface

Table 16-64 describes the fields of the attribute for PCI-X configuration transactions.

16.4.3.8 PCI-X Error Functions

PCI-X provides for parity and other system errors to be detected and reported. This section

describes generation and detection of parity and error reporting for the PCI-X bus.

16.4.3.8.1 Error Reporting

PCI-X provides for the detection and signaling of both parity and other system errors. Two signals

are used to report these errors—PCI_PERR and PCI_SERR. PCI_PERR is used exclusively to

report data parity errors on all transactions except special cycles. The PCI_SERR signal is used

for other error signaling including address parity errors and data parity errors on special-cycle

transactions; it may also be used to signal other system errors.

Note that some errors are enabled by programming two bits—one in the PCI bus command register

and another in the PCI/X error enable register (ERR_EN). Likewise, some errors are reported in

two bits—one in the PCI bus status register and another in the PCI/X error detect register

(ERR_DR). These bits must be cleared separately; that is, clearing one does not clear the other.

For example, clearing the ERR_DR[Mstr abort error] does not clear the received master abort bit

in the PCI bus status register. In these cases, both bits must be cleared before further error reporting

can occur.

Table 16-64. PCI-X Configuration Transaction Attribute Summary

Name

Description

31:29

—

Reserved. Must be 0

28:24 Tag

Identifies up to 32 unique sequences from a single initiator. Tag is also a component of the

sequence ID.

23:16 Requester Bus

Number

Supplied by the bus number field in the PCI-X status register. The requester bus number is

also a component of the sequence ID.

15:11 Requester

Device Number

Supplied by the device number field in the PCI-X status register. The requester bus number

is also a component of the sequence ID.

10:8

Requester

Function Number

Supplied by the function number field in the PCI-X status register. The requester bus

number is also a component of the sequence ID.

7:0

Secondary Bus

Number

The number of the bus on which the Type 0 configuration transaction is executing

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