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MPC8540 Datasheet(PDF) 935 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 935 Page - Freescale Semiconductor, Inc |
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935 / 1302 page  Memory Map/Register Definition MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 17-11 0xD_0CA0 ROWTAR5—RapidIO outbound window translation address register 5 R/W 0x0000_0000 17.3.2.2.1/17-37 0xD_0CA8 ROWBAR5—RapidIO outbound window base address register 5 R/W 0x0000_0000 17.3.2.2.2/17-38 0xD_0CB0 ROWAR5—RapidIO outbound window attributes register 5 R/W 0x0004_401F 17.3.2.2.3/17-39 0xD_0CC0 ROWTAR6—RapidIO outbound window translation address register 6 R/W 0x0000_0000 17.3.2.2.1/17-37 0xD_0CC8 ROWBAR6—RapidIO outbound window base address register 6 R/W 0x0000_0000 17.3.2.2.2/17-38 0xD_0CD0 ROWAR6—RapidIO outbound window attributes register 6 R/W 0x0004_401F 17.3.2.2.3/17-39 0xD_0CE0 ROWTAR7—RapidIO outbound window translation address register 7 R/W 0x0000_0000 17.3.2.2.1/17-37 0xD_0CE8 ROWBAR7—RapidIO outbound window base address register 7 R/W 0x0000_0000 17.3.2.2.2/17-38 0xD_0CF0 ROWAR7—RapidIO outbound window attributes register 7 R/W 0x0004_401F 17.3.2.2.3/17-39 0xD_0D00 ROWTAR8—RapidIO outbound window translation address register 8 R/W 0x0000_0000 17.3.2.2.1/17-37 0xD_0D08 ROWBAR8—RapidIO outbound window base address register 8 R/W 0x0000_0000 17.3.2.2.2/17-38 0xD_0D10 ROWAR8—RapidIO outbound window attributes register 8 R/W 0x0004_401F 17.3.2.2.3/17-39 0xD_0D60 RIWTAR4—RapidIO inbound window translation address register 4 R/W 0x0000_0000 17.3.2.2.4/17-40 0xD_0D68 RIWBAR4—RapidIO inbound window base address register 4 R/W 0x0000_0000 17.3.2.2.5/17-41 0xD_0D70 RIWAR4—RapidIO inbound window attributes register 4 R/W 0x0004_401F 17.3.2.2.6/17-42 0xD_0D80 RIWTAR3—RapidIO inbound window translation address register 3 R/W 0x0000_0000 17.3.2.2.4/17-40 0xD_0D88 RIWBAR3—RapidIO inbound window base address register 3 R/W 0x0000_0000 17.3.2.2.5/17-41 0xD_0D90 RIWAR3—RapidIO inbound window attributes register 3 R/W 0x0004_401F 17.3.2.2.6/17-42 0xD_0DA0 RIWTAR2—RapidIO inbound window translation address register 2 R/W 0x0000_0000 17.3.2.2.4/17-40 0xD_0DA8 RIWBAR2—RapidIO inbound window base address register 2 R/W 0x0000_0000 17.3.2.2.5/17-41 0xD_0DB0 RIWAR2—RapidIO inbound window attributes register 2 R/W 0x0004_401F 17.3.2.2.6/17-42 0xD_0DC0 RIWTAR1—RapidIO inbound window translation address register 1 R/W 0x0000_0000 17.3.2.2.4/17-40 0xD_0DC8 RIWBAR1—RapidIO inbound window base address register 1 R/W 0x0000_0000 17.3.2.2.5/17-41 0xD_0DD0 RIWAR1—RapidIO inbound window attributes register 1 R/W 0x0004_401F 17.3.2.2.6/17-42 0xD_0DE0 RIWTAR0—RapidIO inbound window translation address register 0 R/W 0x0000_0000 17.3.2.2.4/17-40 0xD_0DF0 RIWAR0—RapidIO inbound window attributes register 0 R/W 0x8004_401F 17.3.2.2.6/17-42 Table 17-6. RapidIO Module Memory Map (continued) Offset Register Access Reset Section/Page |
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