MPC8540 datasheet(943/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

17-19

17.3.1.8 Destination Operations Capability Register (DOCAR)

The DOCAR, shown in Figure 17-10, describes RapidIO I/O operations that this device can

service. See the Parallel RapidIO Interconnect Specification for additional details.

NWR Nwrite_r operation. (Write non-sharable memory.) Set for the MPC8540.

0 The RapidIO controller cannot initiate an nwrite_r operation.

1 The RapidIO controller can initiate an nwrite_r operation.

Message operation. (Write to port.) Set for the MPC8540.

0 The RapidIO controller cannot initiate a message operation.

1 The RapidIO controller can initiate a message operation.

Doorbell operation. (Generate and interrupt.) Set for the MPC8540.

0 The RapidIO controller cannot initiate a doorbell operation.

1 The RapidIO controller can initiate a doorbell operation.

—

Reserved

ATS

Atomic test and swap operation. Cleared for the MPC8540.

0 The RapidIO controller can initiate an atomic test and swap operation.

1 The RapidIO controller cannot initiate an atomic test and swap operation.

Atomic_inc operation. Set for the MPC8540.

0 The RapidIO controller cannot initiate an atomic_inc operation.

1 The RapidIO controller can initiate an atomic_inc operation.

Atomic_dec operation. Set for the MPC8540.

0 The RapidIO controller cannot initiate an atomic_dec operation.

1 The RapidIO controller can initiate an atomic_dec operation.

Atomic_set operation. Set for the MPC8540.

0 The RapidIO controller cannot initiate an atomic_set operation.

1 The RapidIO controller can initiate an atomic_set operation.

Atomic_clr operation. Set for the MPC8540.

0 The RapidIO controller cannot initiate an atomic_clr operation.

1 The RapidIO controller can initiate an atomic_clr operation.

—

Reserved

Port-write operation. Cleared for the MPC8540.

0 The RapidIO controller cannot initiate a port-write operation.

1 The RapidIO controller can initiate a port-write operation.

30–31

—

Reserved

Table 17-13. SOCAR Field Descriptions (continued)

Bits

Name

Description

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