MPC8540 datasheet(1014/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

17-90

Freescale Semiconductor

RapidIO Interface

Table 17-86 lists general requirements for a RapidIO-compliant device.

Table 17-86. General Device Functionality List

Item No.

Item Functionality

Meets Reqs?

All device generated packets adhere to the bit streams defined in the appropriate logical,

transport, and physical layer specifications.

All device-generated control symbols adhere to the bit streams defined in the physical layer

specification.

Device assigns reserved packet fields to logic 0s

Device does not use reserved packet formats

Reserved packet field contents are ignored.

Device never assigns reserved encodings for packet fields

Implementation-defined packet fields are ignored unless the function is understood by the

receiving device.

Received reserved packet field encodings are ignored if it is not necessary for the field to be

defined for the requested transaction.

Reads to reserved CAR bits return logic 0s.

Writes to reserved CAR bits are ignored.

Reads to implementation-defined CAR bits return the implementation defined value.

Writes to implementation-defined CAR bits are ignored.

Reads to reserved CARs do not cause an error.

Reads to reserved CARs return logic 0s when read.

Writes to reserved CARs do not cause an error.

Writes to reserved CARs are ignored.

Reads to reserved CSRs and extended features register bits return logic 0s.

Writes to reserved CSRs and extended features register bits are ignored.

Reads to implementation-defined CSR and extended features register bits return the

implementation defined value.

Writes to implementation-defined CSR and extended features register bits are determined

by the implementation.

Reads to reserved CSRs and extended features registers do not cause an error.

Reads to reserved CSRs and extended features registers return logic 0s when read.

Writes to reserved CSRs and extended features registers do not cause an error.

Writes to reserved CSRs and extended features registers are ignored.

Reads and writes to implementation-defined registers and register bits are

implementation-defined.

MPC8540 Datasheet(PDF) 1014 Page - Freescale Semiconductor, Inc