MPC8540 datasheet(1018/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

17-94

Freescale Semiconductor

RapidIO Interface

Table 17-90 lists the requirements for the device to receive a packet.

A response packet for a request packet never transmitted before the acknowledge control symbol

for the request packet.

Embedded CRC properly inserted

Packets that are not aligned to the 32-bit boundary are padded into alignment with 16 bits of logic 0.

CRC values are correctly calculated.

Switch devices preserve error coverage internally.

Packets are completed normally with a new packet or EOP control symbol.

Packets are canceled using stomp, restart-from-retry, or link-request control symbols.

Stomp and restart-from-retry control symbols have the cause field set to all logic 0s.

Device receiving packet-retry control symbol follows the defined retry behavior.

13A. ACTION: Moves from the port OK state to the output retry-stopped state when a packet-retry

control symbol is received

13B. ACTION: Completes transmission of current packet if applicable; don’t transmit new packets

13C. ACTION: Sends a restart-from-retry control symbol to the receiving device

13D. ACTION: Moves from the output retry-stopped state to the port OK state upon completion of

the output port internal retry recovery procedure

13E. ACTION: Begins retransmitting packets from the returned expected ackID value

13F. DETAIL: Retried packet is eventually re-transmitted (end point devices only; not true for

cut-through switch devices)

Table 17-90. General Device 8/16 LP-LVDS Physical Layer Packet

Reception List

Item No.

Item Functionality

Meets Reqs?

AckIDs are only accepted sequentially.

Starts with ackID = 0 after reset

Every packet causes an acknowledge control symbol with the corresponding ackID field.

Device sends acknowledge control symbols in same order as packets are received (ackIDs are

issued sequentially)

Device does not send a packet-accepted control symbol before the entire packet has been received

and is error free (if error checking is enabled)

Physical layer 3 reserved bits are ignored.

Packets can be completed normally with a new packet or EOP control symbol.

The cause field in stomp and restart-from-retry control symbols is ignored.

Table 17-89. General Device 8/16 LP-LVDS Physical Layer Packet

Transmission List (continued)

Item No.

Item Functionality

Meets Reqs?

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