MPC8540 datasheet(1049/1302 Pages) FREESCALE

1049 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

18-1

Chapter 18

Global Utilities

This chapter describes the global utilities of the MPC8540. It provides signal descriptions, register

descriptions, and a functional description of these utilities.

18.1 Overview

The global utilities block controls power management, I/O device enabling, power-on reset (POR)

configuration monitoring, general-purpose I/O signal configuration, alternate function selection

for multiplexed signals, and clock control.

18.2 Global Utilities Features

This section provides an overview of global utilities features.

18.2.1 Power Management and Block Disables

The following features affect the overall power consumption of the device:

•

Dynamic power management mode

•

Software-controlled power management (doze, nap, sleep)

•

Externally controlled power management (doze, sleep)

•

Static power management (I/O block disables)

18.2.2 Accessing Current POR Configuration Settings

The POR configuration values of all device parameters sampled from pins at reset are available

through memory-mapped registers in the global utilities block.

18.2.3 General-Purpose I/O

The PCI and TSEC2 data bus signals can be used as general-purpose I/O signals when not used

for their primary function. Memory-mapped registers in the global utilities block provide control

and status for the use of these signals. A general purpose input register is loaded with the values

of the local bus address/data pins at the negation of HRESET.

MPC8540 Datasheet(PDF) 1049 Page - Freescale Semiconductor, Inc