MPC8540 datasheet(1050/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

18-2

Freescale Semiconductor

Global Utilities

18.2.4 Interrupt and Local Bus Signal Multiplexing

IRQ[9:11] and LCS[5:7] serve multiple functions that can be selected by configuration registers

in the global utilities block.

18.2.5 Clock Control

The global utilities block also selects the internal clock signal driven on CLK_OUT.

18.3 External Signal Descriptions

The following subsections provide information about signals that serve as global utilities.

18.3.1 Signals Overview

Table 18-1 summarizes the external signals used by the global utilities block.

18.3.2 Detailed Signal Descriptions

Table 18-2 describes signals in the global utilities block in detail.

Table 18-1. External Signal Summary

Signal Name

I/O

Description

Reference (Section/Page)

ASLEEP

Signals that the device has reached a sleep state

18.5.1.5.3/18-24

CKSTP_ IN

Checkstop input

—

CKSTP_OUT

Checkstop output

—

CLK_OUT

Clock out. Selected by CLKOCR values

18.4.1.16/18-18

Table 18-2. Detailed Signal Descriptions

Signal

I/O

Description

ASLEEP

Asleep. See Section 18.5.1.5.3, “Sleep Mode.” After negation of HRESET, ASLEEP is asserted until

the device completes its power-on reset sequence and reaches its ready state.

State

Meaning

Asserted—Indicates that the device is either still in its power-on reset sequence or has

reached a sleep state after a power-down command is issued by software

Negated—The device is not in sleep mode. (It has either awakened from a power-down

state or completed the POR sequence.)

Timing

Assertion—May occur at any time; may be asserted asynchronously to the input clocks

Negation—Negates synchronously with SYSCLK when leaving power-on sequence;

otherwise negation is asynchronous

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