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MPC8540 Datasheet(PDF) 1139 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 1139 Page - Freescale Semiconductor, Inc

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Initialization
MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
Freescale Semiconductor
20-33
20.5 Initialization
Configuring the appropriate control register must be the last step in the initialization sequence for
either the watchpoint or trace buffer. That is, all required registers except the corresponding
control register must be configured before any control register bits that enable watchpoint or trace
events are set.
10–13
—
Reserved
14–18
RIODWC
Double-word count. This number times eight equals the byte count.
19–32
—
Reserved
33–63
RIOADDR
Address bits 0–30. Represents a double-word address on RapidIO
Table 20-30. RapidIO Trace Buffer Entry Field Descriptions
(TBCR1[IFSEL] = 011) (continued)
Bits
Name
Function



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