MPC8540 datasheet(1205/1302 Pages) FREESCALE

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Functional Description

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

21-65

21.6.3.1 Transmit Data Buffer Descriptor (TxBD)

Data is presented to the FEC for transmission by arranging it in memory buffers referenced by the

TxBDs. In the TxBD the user initializes the R, PAD/CRC, W, L, and TC bits and the length (in

bytes) in the first word, and the buffer pointer in the second word.

The FEC clears the R bit in the first word of the BD after it finishes using the data buffer. The

transfer status bits are then updated. Additional transmit frame status can be found in statistic

counters in the MIB block. Figure 21-46 describes the TxBD.

The TxBD fields are detailed in Table 21-48.

3 4

Offset + 0

R PAD/CRC W I L

DEF

HFE/LC

TXTRUNC

Offset + 2

DATA LENGTH

Offset + 4

TX DATA BUFFER POINTER

Offset + 6

Figure 21-46. Transmit Buffer Descriptor

Table 21-48. Transmit Data Buffer Descriptor (TxBD) Field

Descriptions

Offset

Bits

Name

Description

Offset + 0

Ready. Written by the FEC and user.

0 The data buffer associated with this BD is not ready for transmission. The user

is free to manipulate this BD or its associated data buffer. The FEC clears this

bit after the buffer is transmitted or after an error condition is encountered.

1 The data buffer, which is prepared for transmission by the user, was not

transmitted or is currently being transmitted. No fields of this BD may be written

by the user once this bit is set.

Offset + 0

PAD/CRC

PAD/CRC. Padding and CRC attachment for frames. (Valid only while it is set in

the first BD and MACCFG2[PAD/CRC] is cleared.) If MACCFG2[PAD/CRC] is set,

this bit is ignored.

0 Do not add padding to short frames. No CRC is appended unless TxBD[TC] is

set.

1 Add PAD/CRCs to frames. Pad bytes are inserted until the length of the

transmitted frame equals 64 bytes. Unlike the MPC8260 which pads up to

MINFLR value, the FEC pads always up to the IEEE minimum frame length of

64 bytes. CRC is always appended to frames.

Offset + 0

Wrap. Written by user.

0 The next buffer descriptor is found in the consecutive location.

1 The next buffer descriptor is found at the location defined in TBASE.

Offset + 0

Interrupt. Written by user.

0 No interrupt is generated after this buffer is serviced.

1 IEVENT[TXB] or IEVENT[TXF] are set after this buffer is serviced. These bits

can cause an interrupt if they are enabled (That is, IEVENT[TXBEN] or

IEVENT[TXFEN] are set).

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