MPC8540 datasheet(1259/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

Glossary-1

Glossary of Terms and Abbreviations

The glossary contains an alphabetical list of terms, phrases, and abbreviations used in this

reference manual.

Architecture. A detailed specification of requirements for a processor or computer

system. It does not specify details of how the processor or computer system

must be implemented; instead it provides a template for a family of

compatible implementations.

Atomic access. A bus access that attempts to be part of a read-write operation to the

same address uninterrupted by any other access to that address (the term

refers to the fact that the transactions are indivisible). The PowerPC

architecture implements atomic accesses through the lwarx/stwcx.

instruction pair.

Autobaud. The process of determining a serial data rate by timing the width of a

single bit.

Beat. A single state on the bus interface that may extend across multiple bus cycles.

A transaction can be composed of multiple address or data beats.

Big endian. A byte-ordering method in memory where the address n of a word

corresponds to the most-significant byte. In an addressed memory word, the

bytes are ordered (left to right) 0, 1, 2, 3, with 0 being the most-significant

byte. See Little endian.

Boundedly undefined. A characteristic of certain operation results that are not

rigidly prescribed by the PowerPC architecture. Boundedly- undefined

results for a given operation may vary among implementations and between

execution attempts in the same implementation.

Although the architecture does not prescribe the exact behavior for when

results are allowed to be boundedly undefined, the results of executing

instructions in contexts where results are allowed to be boundedly

undefined are constrained to ones that could have been achieved by

executing an arbitrary sequence of defined instructions, in valid form,

starting in the state the machine was in before attempting to execute the

given instruction.

Breakpoint. A programmable event that forces the core to take a breakpoint

exception.

MPC8540 Datasheet(PDF) 1259 Page - Freescale Semiconductor, Inc