MSP430 datasheet(37/88 Pages) TI

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7.3.3.1 Alarm Action Configuration Register

The AFEx8101 implements an alarm action configuration register (ALARM_ACT, Table 7-24). Writing to this

ALARM_ACT register determines how the main DAC responds to an alarm event from conversion on self-

diagnostics channels, AIN0, AIN1, and TEMP, as well as a CRC and WDT fault, a VREF fault, a TEMP_HI fault,

and a TEMP_LO fault. Only these faults can cause a response by the DAC. Other alarm status events can

trigger the ALARM pin. There are four options for alarm action. In case different settings are chosen for different

alarm conditions, the following (low-to-high) priority is considered when taking action:

• 0. → No action

• 1. → DAC CLEAR state

• 2. → VOUT alarm voltage

• 3. → VOUT Hi-Z

If the alarm event occurs and option 1 is selected, then the DAC is forced to the clear code and clear range. This

operation is done by controlling the input code to the DAC and the range of the DAC.

If the alarm event occurs and option 2 is selected, then VOUT is forced to the alarm voltage. The alarm voltage

is controlled by either pin or register bit. If SPECIAL_CFG.AIN1_ENB = 0, then the AIN1 pin controls alarm

polarity. Also, register bit SPECIAL_CFG.ALMV_POL can be used. If either of these signals = 1, then the alarm

voltage is high; otherwise, the alarm voltage is low. The SPECIAL_CFG register is only reset with POR, so the

user setting remains intact through hardware or software resets.

If the alarm event occurs and option 3 is selected, then the VOUT buffer is put into Hi-Z.

If multiple events occur, then the highest setting takes precedence. Option 3 has the highest priority.

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AFE78101, AFE88101

SLASF21 – DECEMBER 2022

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MSP430 Datasheet(PDF) 37 Page - Texas Instruments