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MSP430 Datasheet(PDF) 26 Page - Texas Instruments |
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MSP430 Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 88 page ![]() The DAC_OFFSET is stored in the DAC_OFFSET register using 2's-complement encoding. The DAC_OFFSET value can be programmed from –2(N–1) to 2(N–1) – 1 using Equation 3. DAC_OFFSET=−OFFSETMSB×2N−1 +∑i=0N−2OFFSETi×2i (3) where • N = DAC_OFFSET resolution in bits: 16 for the AFE88101 and 14 for the AFE78101. • OFFSETMSB = MSB bit of the DAC_OFFSET register. • OFFSETi = The rest of the bits of the DAC_OFFSET register. • i = Position of the bit in the DAC_OFFSET register. • OFFSET data are left justified; the last two LSBs in the DAC_OFFSET register are ignored for the device. The most significant bit determines the sign of the number and is called the sign bit. The sign bit has the weight of –2(N–1) as shown in Equation 3. The example DAC_OFFSET settings for the AFE88101 are shown in Table 7-4. Table 7-4. DAC_OFFSET Setting vs OFFSET Code DAC_OFFSET OFFSET (HEX) 32767 0x7FFF 1 0x0001 0 0x0000 –1 0xFFFF –2 0xFFFE –32768 0x8000 The following transfer function is applied to the DAC_DATA.DATA based on the DAC_GAIN and DAC_OFFSET values: DAC_CODE= DATA×DAC_GAIN +DAC_OFFSET (4) where • DAC_CODE is the internal signal applied to the DAC. • DATA is the decimal value of the DAC_DATA register. • DAC_GAIN and DAC_OFFSET are the user calibration settings. • DATA data are left justified; the last two LSBs in the DAC_DATA register are ignored for the AFE78101. Substituting DAC_GAIN and DAC_OFFSET in Equation 4 with Equation 2 and Equation 3 results in: DAC_CODE= DATA× 12+GAIN2N −OFFSETMSB×2N−1+∑i=0N−2OFFSETi×2i (5) The multiplier is implemented using truncation instead of rounding. This truncation can cause a difference of one LSB if rounding is expected. Figure 7-2 shows the DAC calibration path. DAC_DATA Register 01h DAC_GAIN Register 04h DAC_OFFSET Register 05h DAC_CODE Gain = ½ + DAC_GAIN / 2 16 < 8000h: Gain < 1 = 8000h: Gain = 1 > 8000h: Gain > 1 + + Offset in 2’s-complement < 0000h: Negative offset 0000h: No offset > 0000h: Positive offset Figure 7-2. DAC Calibration Path AFE78101, AFE88101 SLASF21 – DECEMBER 2022 www.ti.com 26 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: AFE78101 AFE88101 |
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