ADM7151 datasheet(35/45 Pages) AD

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Data Sheet

LT3097

APPLICATIONS INFORMATION

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ror-amplifier gain is needed to amplify the SETP/SETN pin voltage

to a higher output voltage, output load regulation is more tightly

specified in the hundreds of microvolts range and not as a fixed

percentage of the output voltage.

Because the zero temperature-coefficient current source is highly

accurate, the SETP/SETN pin resistor can become a limiting factor

in achieving high accuracy. Therefore, the SETP/SETN pin resistor

must be a precision resistor. Additionally, any leakage paths to or

from the SETP/SETN pin create errors in the output voltage. Use

high-quality insulation (for example, Teflon or Kel-F) if necessary.

Moreover, cleaning of all insulating surfaces to remove fluxes and

other residues can be required. High-humidity environments can

require a surface coating at the SETP/SETN pin to provide a

moisture barrier.

Minimize board leakage by encircling the SETP/SETN pin with

a guard ring that operates at a potential close to itself, ideally

connected to the OUTP/OUTN pins. Guarding both sides of the

circuit board is recommended. Bulk leakage reduction depends

on the guard-ring width. Leakages of 100 nA into or out of the

SETP/SETN pin creates a 0.1% error in the reference voltage.

Leakages of this magnitude, coupled with other sources of leakage,

can cause significant errors in the output voltage, especially over a

wide operating temperature range. Figure 125 illustrates a typical

guard-ring layout technique.

Figure 125. Guard Ring Layout

Because the SETP/SETN pin is a high-impedance node, unwanted

signals can couple into the SETP/SETN pin and cause erratic

behavior, which is most noticeable when operating with a minimum

output capacitor at heavy load currents. Bypassing the SETP/SETN

pin with a small capacitance to ground resolves this issue, 10 nF

is sufficient. For applications requiring higher accuracy or an adjust-

able output voltage, the SETP/SETN pin can be actively driven

by an external voltage source capable of sinking/sourcing 100 μA.

Connecting a precision-voltage reference to the SETP/SETN pin

eliminates any errors in the output voltage due to the reference

current and SETP/SETN pin resistor tolerances.

OUTPUT SENSING AND STABILITY

The OUTSP/OUTSN pin of the LT3097 provides a Kelvin-sense

connection to the output. The GND side of the SETP/SETN pin

resistor provides a Kelvin-sense connection to the GND side of the

load.

Additionally, for ultra-high PSRR, the LT3097 bandwidth of the pos-

itive and negative regulator is made quite high (~1 MHz), making

it close to the self-resonance frequency (~1.6 MHz) of a typical 10

μF (1206 case size), ceramic-output capacitor. Therefore, avoiding

adding extra impedance (ESR and ESL) outside the feedback loop

is important. To that end, as shown in Figure 126, minimize the

effects of PCB trace and solder inductance by connecting the

OUTSP/OUTSN pin directly to COUTP/COUTN and the GND side of

CSETP/CSETN directly to the GND side of COUTP/COUTN, as well as

keeping the GND sides of CINP/CINN and COUTP/COUTN reasonably

close. Refer to the LT3097 evaluation board user guide (EVAL-

LT3097-AZ) for more information on the recommended layout that

meets these requirements. While the LT3097 is robust enough not

to oscillate if the recommended layout is not followed, depending

on the actual layout, phase and gain margin, noise, and PSRR

performance can degrade.

Figure 126. COUTP/COUTN and CSETP/CSETN Connections for Best Performance

STABILITY AND OUTPUT CAPACITANCE

The LT3097 requires an output capacitor for stability. Given its high

bandwidth, Analog Devices, Inc., recommends low ESR and ESL

ceramic capacitors. For the positive regulator, a minimum of 10

μF capacitance with an ESR of less than 20 mΩ and an ESL of

less than 2 nH is required for stability. For the negative regulator, a

minimum of 10 μF capacitance with an ESR of less than 30 mΩ and

an ESL of less than 1.5 nH is required for stability.

Given the high PSRR and low-noise performance attained using

a single 10 μF ceramic-output capacitor, larger values of output

capacitor only marginally improve the performance because the

regulator bandwidth decreases with increasing output capacitance

— hence, there is little to be gained by using larger than the

minimum 10µF output capacitor. Nonetheless, larger values of out-

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