AT25DF021A datasheet(36/59 Pages) RENESAS

36 / 59 page

DS-AT25DF021A-042 Rev. J

Page 36

12/22/22

AT25DF021A Datasheet

11.4 Write Status Register Byte 2

The Write Status Register Byte 2 command is used to modify the RSTE. Using the Write Status Register Byte 2

command is the only way to modify the RSTE in the Status Register during normal device operation. Before the

Write Status Register Byte 2 command can be issued, the Write Enable command must have been previously

issued to set the WEL bit in the Status Register to a Logical 1.

To issue the Write Status Register Byte 2 command, the CS pin must first be asserted and then the opcode 31h

must be clocked into the device followed by one byte of data. The one byte of data consists of three don’t-care

bits, the RSTE bit value, and four additional don’t-care bits (see Table 12). Any additional data bytes sent to the

device are ignored. When the CS pin is deasserted, the RSTE bit in the Status Register is modified, and the WEL

bit in the Status Register is reset back to a Logical 0.

The complete one byte of data must be clocked into the device before the CS pin is deasserted, and the CS pin

must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the device aborts the operation,

the state of the RSTE bit does not change, and the WEL bit in the Status Register is reset back to the Logical 0

state.

Figure 29. Write Status Register Byte 2

Table 12. Write Status Register Byte 2 Format

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

XRSTEX

SCK

MSB

0011000

Opcode

10 11

814 15

MSB

XXX

Status Register In

Byte 2

High-Impedance

AT25DF021A Datasheet(PDF) 36 Page - Renesas Technology Corp