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80C554 Datasheet(PDF) 41 Page - NXP Semiconductors |
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80C554 Datasheet(HTML) 41 Page - NXP Semiconductors |
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41 / 76 page  Philips Semiconductors Preliminary specification 80C554/83C554/87C554 80C51 8-bit microcontroller – 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP 2000 Nov 10 41 S SLA RA DATA P S SLA R A P 08H 40H 50H W 38H A or A OTHER MST CONTINUES OTHER MST CONTINUES 38H 48H 68H 78H 80H OTHER MST CONTINUES A MR 10H TO MST/TRX MODE ENTRY = MT TO CORRESPONDING STATES IN SLAVE MODE SUCCESSFUL RECEPTION FROM A SLAVE TRANSMITTER NEXT TRANSFER STARTED WITH A REPEATED START CONDITION NOT ACKNOWLEDGE RECEIVED AFTER THE SLAVE ADDRESS ARBITRATION LOST IN SLAVE ADDRESS OR ACKNOWLEDGE BIT ARBITRATION LOST AND ADDRESSED AS SLAVE n FROM MASTER TO SLAVE FROM SLAVE TO MASTER ANY NUMBER OF DATA BYTES AND THEIR ASSOCIATED ACKNOWLEDGE BITS THIS NUMBER (CONTAINED IN S1STA) CORRESPONDS TO A DEFINED STATE OF THE I2C BUS. SEE TABLE 7. A DATA A 58H A DATA A SU00972 Figure 41. Format and States in the Master Receiver Mode |
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