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80C554 Datasheet(PDF) 30 Page - NXP Semiconductors

Part # 80C554
Description  80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
PDF  76 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

80C554 Datasheet(HTML) 30 Page - NXP Semiconductors

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Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
30
ECT0
BIT
SYMBOL
FUNCTION
IEN1.7
ET2
Enable Timer T2 overflow interrupt(s)
IEN1.6
ECM2
Enable T2 Comparator 2 interrupt
IEN1.5
ECM1
Enable T2 Comparator 1 interrupt
IEN1.4
ECM0
Enable T2 Comparator 0 interrupt
IEN1.3
ECT3
Enable T2 Capture register 3 interrupt
IEN1.2
ECT2
Enable T2 Capture register 2 interrupt
IEN1.1
ECT1
Enable T2 Capture register 1 interrupt
IEN1.0
ECT0
Enable T2 Capture register 0 interrupt
SU00755
ECT1
ECT2
ECT3
ECM0
ECM1
ECM2
ET2
0
1
2
3
4
5
6
7
(LSB)
(MSB)
IEN1 (E8H)
In all cases, if the enable bit is 0, then the interrupt is disabled, and if the enable bit is 1, then the interrupt is enabled.
Figure 28. Interrupt Enable Register (IEN1)
PX0
BIT
SYMBOL
FUNCTION
IP0.7
–
Unused
IP0.6
PAD
ADC interrupt priority level
IP0.5
PS1
SIO1 (I2C) interrupt priority level
IP0.4
PS0
SIO0 (UART) interrupt priority level
IP0.3
PT1
Timer 1 interrupt priority level
IP0.2
PX1
External interrupt 1 priority level
IP0.1
PT0
Timer 0 interrupt priority level
IP0.0
PX0
External interrupt 0 priority level
SU00763
PT0
PX1
PT1
PS0
PS1
PAD
–
0
1
2
3
4
5
6
7
(LSB)
(MSB)
IP0 (B8H)
Figure 29. Interrupt Priority Register (IP0)
PX0H
BIT
SYMBOL
FUNCTION
IP0H.7
–
Unused
IP0H.6
PADH
ADC interrupt priority level high
IP0H.5
PS1H
SIO1 (I2C) interrupt priority level high
IP0H.4
PS0H
SIO0 (UART) interrupt priority level high
IP0H.3
PT1H
Timer 1 interrupt priority level high
IP0H.2
PX1H
External interrupt 1 priority level high
IP0H.1
PT0H
Timer 0 interrupt priority level high
IP0H.0
PX0H
External interrupt 0 priority level high
SU00983
PT0H
PX1H
PT1H
PS0H
PS1H
PADH
–
0
1
2
3
4
5
6
7
(LSB)
(MSB)
IP0H (B7H)
Figure 30. Interrupt Priority Register High (IP0H)



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