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80C554 Datasheet(PDF) 40 Page - NXP Semiconductors |
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80C554 Datasheet(HTML) 40 Page - NXP Semiconductors |
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40 / 76 page  Philips Semiconductors Preliminary specification 80C554/83C554/87C554 80C51 8-bit microcontroller – 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP 2000 Nov 10 40 S SLA WA A DATA P S SLA W A P A P 08H 18H 28H R 38H A or A OTHER MST CONTINUES A or A OTHER MST CONTINUES 38H 30H 20H 68H 78H 80H OTHER MST CONTINUES A MT 10H TO MST/REC MODE ENTRY = MR TO CORRESPONDING STATES IN SLAVE MODE SUCCESSFUL TRANSMISSION TO A SLAVE RECEIVER NEXT TRANSFER STARTED WITH A REPEATED START CONDITION NOT ACKNOWLEDGE RECEIVED AFTER THE SLAVE ADDRESS NOT ACKNOWLEDGE RECEIVED AFTER A DATA BYTE ARBITRATION LOST IN SLAVE ADDRESS OR DATA BYTE ARBITRATION LOST AND ADDRESSED AS SLAVE A n FROM MASTER TO SLAVE FROM SLAVE TO MASTER ANY NUMBER OF DATA BYTES AND THEIR ASSOCIATED ACKNOWLEDGE BITS THIS NUMBER (CONTAINED IN S1STA) CORRESPONDS TO A DEFINED STATE OF THE I2C BUS. SEE TABLE 6. Data SU00971 Figure 40. Format and States in the Master Transmitter Mode |
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