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80C554 Datasheet(PDF) 23 Page - NXP Semiconductors |
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80C554 Datasheet(HTML) 23 Page - NXP Semiconductors |
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23 / 76 page ![]() Philips Semiconductors Preliminary specification 80C554/83C554/87C554 80C51 8-bit microcontroller – 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP 2000 Nov 10 23 PWM0 fOSC 8-BIT COMPARATOR 8-BIT COUNTER 8-BIT COMPARATOR PWM1 PRESCALER OUTPUT BUFFER PWMP OUTPUT BUFFER PWM0 PWM1 SU01448 Figure 19. Functional Diagram of Pulse Width Modulated Outputs INTERNAL BUS 10-BIT A/D CONVERTER ANALOG INPUT MULTIPLEXER 0 1234567 01 234567 + – STADC ANALOG REF. ANALOG SUPPLY ANALOG GROUND ADC0 ADC1 ADC2 ADC3 ADC4 ADC5 ADC6 ADCON ADCH SU01467 Figure 20. Functional Diagram of Analog Input Circuitry 10-Bit Analog-to-Digital Conversion: Figure 21 shows the elements of a successive approximation (SA) ADC. The ADC contains a DAC which converts the contents of a successive approximation register to a voltage (VDAC) which is compared to the analog input voltage (Vin). The output of the comparator is fed to the successive approximation control logic which controls the successive approximation register. A conversion is initiated by setting ADCS in the ADCON register. ADCS can be set by software only or by either hardware or software. The software only start mode is selected when control bit ADCON.5 (ADEX) = 0. A conversion is then started by setting control bit ADCON.3 (ADCS). The hardware or software start mode is selected when ADCON.5 = 1, and a conversion may be started by setting ADCON.3 as above or by applying a rising edge to external pin STADC. When a conversion is started by applying a rising edge, a low level must be applied to STADC for at least one machine cycle followed by a high level for at least one machine cycle. |
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