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Data Sheet A17989EE2V0DS00

µPD800261

2.2 Operating Conditions

Table 2-2:

Recommended Operating Conditions (1/2)

Parameter

Symbol

Test

Conditions

MIN.

TYP.

MAX.

Unit

Power supply for core

VDD Core

1.35

1.5

1.65

Power supply for IO

VDD IO

3.0

3.3

3.6

Analog power supply for PLL

PLL_AVDD

1.35

1.5

1.65

Digital power supply for PHYs

DVVD

1.35

1.5

1.65

Analog central 3.3 V supply for PHYs

VDDACB

3.0

3.3

3.6

Analog central 1.5 V supply for PHYs

VDDAPLL

1.35

1.5

1.65

Analog Rx/Tx port power supply

P(2:1)VDDARXTX

1.35

1.5

1.65

PECL buffer power supply

VDDQ (PECL)

3.0

3.3

3.6

Analog test supply

VDD33ESD

3.0

3.3

3.6

Ambient temperature

-40

+85

°C

Output voltage high

3.3 V CMOS

VOH

IOH = 0 mA

VDD IO -

0.1 V

nominal

output

current

2.4

Output voltage low

3.3 V CMOS

VOL

IOL = 0 mA

0.1

nominal

output

current

0.4

Input voltage high

3.3 V CMOS

VIH

VDD IO

3.3 V PECL

difference

to VDDQ

level

-0.880

-1.165

Input voltage low

3.3 CMOS

VIL

00.8

3.3 V PECL

difference

to VDDQ

level

-1.475

-1.880

Positive trigger voltage

Schmitt

input

1.2

2.4

Negative trigger volt-

age

0.6

1.8

Hysteresis voltage

0.3

1.5

Input rise time

3.3 V CMOS

tRI

0200

Input fall time

tFI

0200

Input rise time

Schmitt

input

tRI

010

Input fall time

tFI

010

ERTEC Datasheet(PDF) 31 Page - Renesas Technology Corp

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