AD7294 datasheet(35/45 Pages) AD

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Preliminary Technical Data

AD7294

Reading Two Bytes of Data from a Result Register

The result register, TSENSE1 result register and the TSENSE2 register

are 16-bit registers used to store the conversion results from the

ADC. The master must first write to the command register to

determine which multiplexed channel to convert on. The

address pointer register is then pointed towards the register to

which to enter the converted data. The master sends a repeated

start to the frame and then enters the two bytes of converted

data into the desired result register. :

The master device asserts a start condition on SDA.

The master sends the 7-bit slave address followed by the

write bit (low).

The addressed slave device asserts ACK on SDA.

The master sends a register address of all 0s in order to

write to the command register.

The addressed slave device asserts ACK on SDA.

The master writes to the command register.

The slave asserts ACK on SDA.

The master sends a register address.

The slave asserts ACK on SDA.

10. The master device asserts a repeated start condition on

SDA.

11. The master sends the 7-bit slave address followed by the

read bit (high).

12. The slave asserts ACK on SDA.

13. The master sends the most significant data byte.

14. The master asserts ACK on SDA.

15. The master sends the least significant data byte.

16. The master asserts NACK on SDA, so the slave knows that

the data transfer is complete.

17. The master asserts a stop condition on SDA to end the

transaction.

SD A

ACK. BY

AD7294

R/W

SC L

C 6

FRAME 3

C OMMAND REGISTER VALUE

SC L (CO NTINUED )

SD A (CO NTINU E D)

ST AR T BY

MA ST ER

ACK. BY

AD7294

ACK. BY

AD7294

FRA ME 1

SERIAL BUS ADDRESS BYT E + WRITE

FR AME 2

COMMAND PO IN TER RE GIST ER BY TE

ACK. BY

AD7294

FR AME 4

POINTER TO RESULT REGISTER

SC L (CONTINUED )

SD A (CO NTINU E D)

R/W

ACK. BY

AD7294

FRA ME 5

SERIAL BUS ADDRESS BYTE + READ

REPEATED START

BY MASTER

ACK. BY

MASTER

ALERT CHID

D10

D11

FRA ME 6

MOST SIGNIFICANT DATA BYTE

SC L (CONTINUED )

SD A (CON TINUE D)

NO ACK BY

MASTER

FRAME 7

LEAST SIGNIFICANT DATA BYTE

CHID

STOP BY

MASTER

Figure 32. Reading 2-Bytes from Result Register

Rev. PrB | Page 35 of 45

AD7294 Datasheet(PDF) 35 Page - Analog Devices

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