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AD7294 Datasheet(PDF) 38 Page - Analog Devices |
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AD7294 Datasheet(HTML) 38 Page - Analog Devices |
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38 / 45 page ![]() AD7294 Preliminary Technical Data Rev. PrB | Page 38 of 45 MODES OF OPERATION When supplies are first applied to the AD7294 the ADC powers up in sleep mode and normally rmains in this shutdown state while not converting. There are two different methods of initiating a conversion on the AD7294. MODE 1 – COMMAND MODE In this mode the part cycles through the selected channels on each subsequent read. To setup the command mode the command register must first be told which ADC channels to convert on, see Table 7 . In the case of TSENSE1, TSENSE2 and TSENSEINT, the command mode is not actually requesting a conversion but outputting the last automatic conversion in sequence. In the case of the internal temperature sensor TSENSEINT, it is not possible to read the result via the ADC result register. The result is stored in the TSENSEINT result register. Figure 35 illustrates a 2–byte read operation from the result register. Prior to the read operation, ensure that the address pointer is pointing to the command register. In the command register choose the sequence of conversions required. At this point the ADC will power up and begin channel conversions. Also take note that the address pointer must be re-addressed to the result register to read the conversions results. For each channel conversion in the sequence, the frame is re-addressed to the result register to synchronize the frames. When more then one channel is selected in the command register. The first read accesses the data from the conversion on channel1. While this read takes place, a conversion occurs on channel 2. The second read accesses this data from channel 2 and so on. The wake-up and conversion time together should take approximately 5 μs, and the conversion begins when the last bit in the command register has been clocked in. SD A ACK. B Y AD7294 11 9 9 00 0 0 00 R/W A0 A1 A2 A3 A4 1 SC L 1 00 91 9 C8 C7 C 6 C3 C2 C1 C5 C4 FR A ME 3 C OMMAND REGISTER VALUE SC L (CON TIN U ED ) SD A (CO NTINUE D) ST AR T BY MA ST ER ACK. BY AD7294 A CK. BY AD7294 FR A ME 1 SERIAL BUS A DDR E SS BYT E + WRITE FRAME 2 COMMAND PO IN TER RE GIST ER BY TE ACK. B Y AD7294 19 P7 P6 P5 P2 P1 P0 P4 P3 FR A ME 4 POINTER TO RESULT REGISTER SC L (CON TIN U ED ) SD A (CO NTINUE D) 19 R/W A0 A1 A2 A3 A4 1 1 A CK. BY AD7294 FR A ME 5 SERIAL BUS ADDRESS BYTE + READ REPEATED START BY MASTER ACK. BY MASTER 19 ALERT CHID D10 D9 D8 D11 FR A ME 6 MOST SIGNIFICANT DATA BYTE SC L (CON TIN U ED ) SD A (CONTINUE D) NO ACK BY MASTER 19 D7 D6 D5 D2 D1 D0 D4 D3 FR A ME 7 LEAST SIGNIFICANT DATA BYTE CHID CHID STOP BY MASTER Figure 35. Command Mode Operation |
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