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AD7294 Datasheet(PDF) 27 Page - Analog Devices |
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AD7294 Datasheet(HTML) 27 Page - Analog Devices |
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27 / 45 page  Preliminary Technical Data AD7294 Rev. PrB | Page 27 of 45 Table 13. Alert Status Register A Alert Bit A7 A6 A5 A4 A3 A2 A1 A0 Function CH4 high alert CH4 low alert CH3 high alert CH3 low alert CH2 high alert CH2 low alert CH1 high alert CH1 low alert Table 14. Alert Status Register B Alert Bit B7 B6 B5 B4 B3 B2 B1 B0 Function Reserved Reserved ISENSE2 over-range ISENSE1 over-range ISENSE2 high alert ISENSE2 low alert ISENSE1 high alert ISENSE1 low alert Table 15. Alert Status Register C Alert Bit C7 C6 C5 C4 C3 C2 C1 C0 Function Open-diode flag Over-temp alert TSENSEINT high alert TSENSEINT low alert TSENSE2 high alert TSENSE2 low alert TSENSE1 high alert TSENSE1 low alert Table 16. Channel Sequence Register Channel Bit D7 D6 D5 D4 D3 D2 D1 D0 Function Reserved Reserved ISENSE2 ISENSE1 CH4 CH3 CH2 CH1 Table 17. Configuration Register Bit Function Description Config. Bit Comment D15 Reserved D14 Enable noise-delayed sampling. Used to delay critical sample intervals from occurring when there is activity on the I2C bus. D13 Enable noise-delayed bit trials. Used to delay critical bit trials from occurring when there is activity on the I2C bus. D12 Enable autocycle mode. D11 Enable pseudodifferential mode for CH3/CH4 D10 Enable pseudodifferential mode for CH1/CH2 D9 Enable differential mode for CH3/CH4 D8 Enable differential mode for CH1/CH2 D7 Enable 2 VREF range on CH4 D6 Enable 2 VREF range on CH3 D5 Enable 2 VREF range on CH2 D4 Enable 2 VREF range on CH1 D3 Enable I2C filters D2 Enable alert pin D1 Enable busy pin (D2 = 0)/clear alerts (D2 = 1) D0 Sets polarity of alert pin (active high/active low) Table 18. ALERT/BUSY Function D2 D1 ALERT/BUSY Pin Configuration 0 0 Pin does not provide any interrupt signal. 0 1 Pin configuration as a BUSY output 1 0 Pin configuration as an ALERT output. 1 1 Resets the ALERT output pin, the Alert_Flag bit in the conversion result register, and the entire alert status register (if any is active). If 1/1 is written to Bits D2/D1 in the configuration register to reset the ALERT pin, the Alert_Flag bit, and the alert status register, the contents of the configuration register read 1/0 for D2/D1, respectively, if read back. |
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