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VR5510 Datasheet(PDF) 21 Page - NXP Semiconductors

Part # VR5510
Description  Multi-output PMIC with SMPS and LDO
PDF  203 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

VR5510 Datasheet(HTML) 21 Page - NXP Semiconductors

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NXP Semiconductors
VR5510
Multi-output PMIC with SMPS and LDO
aaa-039362
RSTB release
Write all INIT_FS registers
With Reg/Reg_NOT procedure
Assign Vregx to ABIST2
Configure SVS if needed
LBIST fail prevent the release of FS0B pin
ABIST1 fail prevent the release of FS0B pin
Possibility to go back to OFF Mode FS by I2C
and restart the device
OFF Mode FS
VDDOTP = 5 V
VSUP > 6.5 V
and PWRON1 > 4 or PWRON2 > 1.25 V
VDDIO = 1.8 V/3.3 V
OTP mode
(emulation/programming)
Pwr up with OTP config
DBG = 0 V
Close INIT_FS
with 1x good WD refresh
Decrease FLT_ERR_CNT to `0'
with WD_ERR_LIMIT good WD refresh
Wait Vregx pwr up
Run ABIST2 by I2C
and wait 1.2 ms
Release FS0B with
RELEASE-FS0B[23:8]=NOT_WD_SEED[8:23]
Disable WD
DBG_EXIT == 1
ABIST2 fail prevent the release of FS0B pin
Possibility to go back to INIT_FS by I2C
and remove the failing regulator from ABIST2 list
No
LBIST_OK == 1
ABIST1_OK == 1
Yes
No
ABIST2_OK == 1
Yes
Figure 10. Debug flow chart
Note: Use I2C to disable the watchdog before INIT_FS closure and Debug mode exit in order to allow FS0B to
be released. Otherwise, FS0B remains stuck low in debug mode.
VR5510
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 6 — 31 July 2023
21 / 203



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