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VR5510 Datasheet(PDF) 97 Page - NXP Semiconductors |
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VR5510 Datasheet(HTML) 97 Page - NXP Semiconductors |
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97 / 203 page ![]() NXP Semiconductors VR5510 Multi-output PMIC with SMPS and LDO Description Report a Standby timer expiration 0 No error 1 Standby timer expiration STBY_TIMER_G Reset condition POR Description Report a VSUP UVL, UVH and UV7 0 No event 1 Event occurred VSUP_G Reset condition POR Description Report a TSD event 0 No event 1 Event occurred TSD_BIST_ERR_G Reset condition POR Table 81. M_FLAG register description...continued 25.2 M_MODE register Return to Register Map Bits BIT23 BIT22 BIT21 BIT20 BIT19 BIT18 BIT17 BIT16 Write 0 0 0 0 0 0 0 0 Read Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reset 0 0 0 0 0 0 0 0 BIT15 BIT14 BIT13 BIT12 BIT11 BIT10 BIT9 BIT8 0 EXT_ FIN_DIS 0 PWRON2_ DSM_EN STBY_ PGOOD_ TEST_LVL PWRON2DIS PWRON1DIS STBY_ PGOOD_ TEST_EN PLL_ LOCKED Reserved MAIN_ NORMAL PWRON2_ DSM_EN STBY_ PGOOD_ TEST_LVL PWRON2DIS PWRON1DIS STBY_ PGOOD_ TEST_EN 0 0 0 0 0 0 0 0 Description Enable or disable the Standby PGOOD test function (only available if OTP enable) 0 Disabled 1 Enabled STBY_PGOOD_ TEST_EN Reset condition POR Table 82. M_MODE register description VR5510 All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 6 — 31 July 2023 97 / 203 |
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