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VR5510 Datasheet(PDF) 39 Page - NXP Semiconductors

Part # VR5510
Description  Multi-output PMIC with SMPS and LDO
PDF  203 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

VR5510 Datasheet(HTML) 39 Page - NXP Semiconductors

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NXP Semiconductors
VR5510
Multi-output PMIC with SMPS and LDO
Symbol
Parameter
Min
Typ
Max
Unit
Output voltage accuracy (0.4 V< VBUCK12 < 0.7 V), PWM
-10
—
10
mV
Output voltage accuracy (0.7 V ≤ VBUCK12 ≤ 0.8 V), PWM
-8
—
8
mV
Output voltage accuracy (0.8 V< VBUCK12≤ 1.5 V), PWM
-1.5
—
1.5
%
Output voltage accuracy (VBUCK12 = 1.8 V), PWM
-2
—
2
%
Output voltage accuracy (0.4 V< VBUCK12< 1.5 V), PFM
- 30
—
30
mV
VBUCK12ACC
Output voltage accuracy (VBUCK12 = 1.8 V), PFM
- 40
—
40
mV
IBUCK12_Q
Quiescent Current, PFM Mode, VSUP = 12 V
—
12
—
μA
VBUCK12_SW
Switching Frequency Range
2.1
2.22
2.35
MHz
LBUCK12
Inductor for VBUCK12_SW =2.22 MHz
—
1.0
—
μH
Effective output capacitor (for 1 phase)
35
—
160
μF
COUT_BUCK12
Output decoupling capacitor
—
0.1
—
μF
Effective input capacitor
(one each close to BUCK1_IN and BUCK2_IN pins)
4.23
—
—
μF
CIN_BUCK12
Input decoupling capacitor
(one each close to BUCK1_IN and BUCK2_IN pins)
—
0.1
—
μF
VBUCK12_TLR
Transient Load Regulation for VBUCK12 <1.2 V
(Cout = 44 μF, from 200 mA to 1 A, di/dt = 2 A/μs) single phase
(Cout = 44 μF, from 400 mA to 2 A, di/dt = 4 A/μs) dual phase
-25
—
+25
mV
VBUCK12_TLR
Transient Load Regulation for VBUCK12 >1.2 V
(Cout = 44 μF, from 200 mA to 1 A, di/dt = 2 A/μs) single phase
(Cout = 44 μF, from 400 mA to 2 A, di/dt = 4 A/μs) dual phase
-3
—
+3
%
2.4
3
3.7
A
ILIM_BUCK12
Inductor peak current limitation range for one phase
(OTP configuration)
3.6
4.5
5.45
A
DVS Ramp up Speed , BUCK12DVS_RAMP_OTP[1:0] = 00
9.5
15.6
23.6
mV/μs
DVS Ramp up Speed , BUCK12DVS_RAMP_OTP[1:0] = 01
4.8
7.8
11.8
mV/μs
DVS Ramp up Speed , BUCK12DVS_RAMP_OTP[1:0] = 10
1.56
2.6
3.94
mV/μs
VBUCK12_DVS_UP
(0.4 V to 1.5 V)
DVS Ramp up Speed , BUCK12DVS_RAMP_OTP[1:0] = 11
1.33
2.23
3.38
mV/μs
DVS Ramp up Speed , BUCK12DVS_RAMP_OTP[1:0] = 00
11.87
19.53 29.5
mV/μs
DVS Ramp up Speed , BUCK12DVS_RAMP_OTP[1:0] = 01
6
9.76
14.75 mV/μs
DVS Ramp up Speed , BUCK12DVS_RAMP_OTP[1:0] = 10
1.95
3.25
4.92
mV/μs
VBUCK12_DVS_UP
(1.8 V)
DVS Ramp up Speed , BUCK12DVS_RAMP_OTP[1:0] = 11
1.67
2.78
4.22
mV/μs
DVS Ramp down Speed , BUCK12DVS_RAMP_OTP[1:0] = 00
6.3
10.41 15.8
mV/μs
DVS Ramp down Speed , BUCK12DVS_RAMP_OTP[1:0] = 01
3.1
5.2
7.9
mV/μs
DVS Ramp down Speed , BUCK12DVS_RAMP_OTP[1:0] = 10
1.56
2.6
3.94
mV/μs
VBUCK12_DVS_DOWN
(0.4 V to 1.5 V)
DVS Ramp down Speed , BUCK12DVS_RAMP_OTP[1:0] = 11
1.33
2.23
3.38
mV/μs
Table 17. Electrical characteristics...continued
VR5510
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 6 — 31 July 2023
39 / 203



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