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UPB1007K Datasheet(PDF) 12 Page - Renesas Technology Corp |
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UPB1007K Datasheet(HTML) 12 Page - Renesas Technology Corp |
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12 / 29 page ![]() Data Sheet PU10014EJ02V0DS 10 µµµµPB1007K STANDARD CHARACTERISTICS (TA = +25 °°°°C, VCC = 3.0 V) Parameter Symbol Test Conditions Reference Unit Pre-amplifier Block (fRFin = 1 575.42 MHz, ZS = ZL = 50 Ω) Input 1dB Compression Level Pin(1dB) Input/Output matching −20 dBm RF Down-converter Block (P1stLOin = −10 dBm, ZS = ZL = 50 Ω) LO Leakage to IF Pin LOif f1stLOin = 1 636.80 MHz −37 dBm LO Leakage to RF Pin LOrf f1stLOin = 1 636.80 MHz −36 dBm Input 3rd Order Intercept Point IIP3(RF) fRFin1 = 1 600 MHz, fRFin2 = 1 605 MHz, f1stLOin = 1 660 MHz −15 dBm IF Down-converter Block (1st LO oscillating, ZS = 50 Ω, ZL = 2 kΩ) LO Leakage to 1st IF Pin LO1stif f2ndLOin = 65.472 MHz −90 dBm LO Leakage to 2nd IF Pin LO2ndif f2ndLOin = 65.472 MHz −63 dBm Input 3rd Order Intercept Point IIP3(IF) f1stIFin1 = 61.38 MHz, f1stIFin2 = 61.48 MHz, f2ndLOin = 65.472 MHz −27.5 dBm PLL Synthesizer Block Phase Comparing Frequency fPD PLL loop 8.184 MHz VCO Block Phase Noise C/N PLL Loop, ∆1 kHz of VCO wave 83 dBc/Hz |
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