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27010 Datasheet(PDF) 10 Page - Texas Instruments |
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27010 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 30 page ![]() www.ti.com Register Initialization and Data Integrity Checks GPIO Layout Considerations Gas Gauge Operation bq27010, bq27210 SLUS707B – APRIL 2006 – REVISED JANUARY 2007 FUNCTIONAL DESCRIPTION (continued) Checksums of critical internal register data are continually checked during operation of the bqJUNIOR. A failed checksum comparison will force a hardware reset. After a reset, the bqJUNIOR examines a checksum containing LMD, CYCL, CYCT, and other critical data. If the checksum is incorrect, NAC, CYCL, and CYCT are cleared, LMD and other parameters are initialized from EEPROM, the CI bit in FLAGS is set, and the INIT bit in MODE is set. This process constitutes a full reset. If the checksum is correct, NAC, LMD, CYCL, and CYCT are retained. In addition, a second checksum containing all user-updateable EEPROM coefficients is checked. If the second checksum is incorrect, the values are all initialized from the EEPROM, the CI bit in FLAGS is set, and the INIT bit in MODE is set. The INIT bit is used to inform the host that it may need to reinitialize these values if the default values are not satisfactory. If the second checksum is correct, the INIT bit in MODE will not be set, the CI bit in FLAGS will remain unchanged, and the register data that may have been updated by the host will be retained. This process constitutes a partial reset. It is the host responsibility to clear the INIT bit in MODE after any updates by the host are completed. See CTRL description for more on host updates. Other register values not specifically retained are reinitialized on all resets. The GPIO pin can be used as an input or an output. The initial state can be established by programming bit 7 in the PKCFG EEPROM location. The input/output state can be changed at any time by changing the value in bit 7 of MODE. If unused, the GPIO pin should be tied to VSS. The auto-calibrating DSCC approach effectively cancels the internal offset voltage within the bqJUNIOR, but any external offset caused by PCB layout must be programmed in the EEPROM to be cancelled. The magnitude and variability of the external offset makes it critical to pay special attention to the PCB layout. To obtain optimal performance, the decoupling capacitor from VCC to VSS and the filter capacitors from SRP and SRN to VSS should be placed as closely as possible to the bqJUNIOR, with short trace runs to both signal and VSS pins. All low-current VSS connections should be kept separate from the high-current discharge path from the battery and should tie into the high-current trace at a point directly next to the sense resistor. This should be a trace connection to the edge or inside of the sense resistor connection, so that no part of the VSS interconnections carry any load current and no portion of the high-current PCB trace is included in the effective sense resistor (i.e. Kelvin connection). Figure 4 illustrates an operational overview of the gas gauge function. The bqJUNIOR reports uncompensated nominal available capacity (NAC), uncompensated last measured discharge (LMD), compensated available capacity (CAC), and full charge compensated available capacity (FCAC). The compensated CAC and FCAC values are reduced from their respective uncompensated NAC and LMD values by an amount that varies with discharge rate, temperature, and cycle count (age). CAC and FCAC will equal their respective uncompensated NAC and LMD values at light loads and when charging. The bqJUNIOR learns the capacity of the battery during actual use conditions and will update LMD when a valid learning cycle occurs. The bqJUNIOR learns the capacity of the battery by measuring the capacity removed from the battery when it is discharged from full (NAC = LMD) to the first end-of-discharge (EDV1) voltage threshold without any learning cycle disqualifying event. The EDV1 threshold should be programmed to a value determined from battery characterization that affords 6.25% of design capacity (DC) remaining before the battery reaches zero capacity. The measured discharge capacity plus 6.25% of DC is the measured full capacity during actual use (compensated) conditions. LMD will be updated with the measured discharge plus 6.25% of DC plus the capacity compensation value due to discharge rate, temperature, and age. Thus the compensated FCAC value, with the capacity compensation subtracted from it, will match the measured discharge capacity plus the 6.25% of DC unmeasured discharge capacity. The final end-of-discharge (EDVF) threshold is a fixed value and should be set at a voltage that the system sees as the zero-capacity battery voltage. The bqJUNIOR does not learn the capacity between the EDV1 and EDVF thresholds, so the EDV1 threshold should be based on actual battery characterization. The EDV1 threshold can be compensated with discharge rate and temperature to maintain the 6.25% remaining capacity with different use profiles. 10 Submit Documentation Feedback |
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