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Nominal Available Capacity Registers (NACL/NACH) — Address 0x0C/0x0D

Last Measured Discharge Registers (LMDL/LMDH) – Address 0x0E/0x0F

Compensated Available Capacity (CACL/CACH) – Address 0x10/0x11

Fully-Charged Compensated Available Capacity (FCACL/FCACH) – Address 0x12/0x13

Average Current Registers (AIL/AIH) — Address 0x14/0x15

Time-to-Empty Registers (TTEL/TTEH) — Address 0x16/0x17

bq27010, bq27210

SLUS707B – APRIL 2006 – REVISED JANUARY 2007

This register pair reports the light-load, or uncompensated, capacity available from the battery. NAC increments

NAC registers are cleared by a reset if RAM corruption is detected. The register value is retained after a reset if

RAM corruption is not detected. The host system has read-only access to this register pair. NAC is reported in

units of 3.57 µVh per count.

This register pair reports the light load, or uncompensated, capacity available from the battery when fully

charged. This value is updated after a valid learning cycle, which occurs when the battery is discharged from

fully charged (NAC = LMD) until the EDV1 voltage threshold is detected (EDV1 = 1) without any learning cycle

disqualifying event (VDQ = 1 during entire discharge). LMD will be updated with the measured capacity removed

from the battery during the discharge until the EDV1 threshold is reached plus 6.25% of design capacity (the

unmeasured capacity from EDV1 until the EDVF zero capacity threshold voltage) plus the computed capacity

compensation reduction due to discharge rate, temperature, and age. The host system has read-only access to

this register pair. LMD is reported in units of 3.57 µVh per count.

This register pair reports the available capacity in the battery at the present discharge rate, temperature, and

age. CAC is equal to NAC minus the capacity compensation reduction based on the compensation coefficients

programmed

in

DCOMP

(discharge

compensation

coefficients),

TCOMP

(temperature

compensation

coefficients), and GAF/DEDV (gain age compensation coefficient). All compensations are impedance-based and

CAC will equal NAC at very low currents. However, CAC is not allowed to increase as long as there is no

charging current. If the discharge load is reduced, CAC may stop decrementing even though NAC continues to

decrement. When NAC drops sufficiently that the NAC minus CAC difference is equal to the discharge

compensation at the reduced load current, CAC will again start decrementing. CAC will equal NAC when

charging. The host system has read-only access to this register pair. CAC is reported in units of 3.57

µVh per

count.

This register pair reports the fully-charged capacity of the battery at the present discharge rate, temperature, and

age. FCAC is equal to LMD minus the capacity compensation reduction based on the compensation coefficients

programmed

in

DCOMP

(discharge

compensation

coefficients),

TCOMP

(temperature

compensation

coefficients), and GAF/DEDV (gain age compensation coefficient). All compensations are impedance-based and

FCAC will converge to LMD as the measured discharge current approaches zero. FCAC will equal LMD when

charging. The host system has read-only access to this register pair. FCAC is reported in units of 3.57

µVh per

count.

This register pair reports the magnitude of the average current through the sense resistor. The value is reported

with a resolution of 3.57

µV per count. Use the following equation to convert the value to mA, where R

sense resistor value in milliohms:

The current reported is an average over the last 5.12 seconds. The host system has read-only access to this

register pair.

This register pair reports calculated time-to-empty at the measured discharge rate. This value is based on the

temperature and discharge rate compensated available charge and the average current. The equation to

calculate TTE is:

TTE = 60 * CAC / AI

TTE is reported in minutes. The host system has read-only access to this register pair.

16

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