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Time-to-Full Registers (TTFL/TTFH) — Address 0x18/0x19

Standby Current Registers (SIL/SIH) — Address 0x1A/0x1B

Standby Time-to-Empty Registers (STTEL/STTEH) — Address 0x1C/0x1D

Compensated End-of-Discharge Registers (CEDVL/CEDVH) – Address 0x20/0x21

Time-to-Empty at Constant Power Registers (TTECPL/TTECPH) – Address 0x26/0x27

Cycle Count Since Learning Cycle Registers (CYCLL/CYCLH) — Address 0x28/0x29

Cycle Count Total Registers (CYCTL/CYCTH) — Address 0x2A/0x2B

bq27010, bq27210

SLUS707B – APRIL 2006 – REVISED JANUARY 2007

This register pair reports calculated time-to-full at the measured charge rate. The time computed at the average

current charge rate is extended by 50% to estimate the effect of the current taper. TTF is reported in minutes.

The equation for TTF is:

TTF = 60 * 1.50 * (LMD-NAC) / AI

The host system has read-only access to this register pair.

This register pair reports measured standby current through the sense resistor. The standby current is an

adaptive measurement. Initially, the register pair reports the standby current programmed in EEPROM and after

spending some time in standby, the register pair reports the measured standby current. The register value is

updated every 5.12 seconds when the measured current is above the DMF threshold and is less than or equal

to 2x the initial programmed standby current value. Each new SI value is computed as follows:

This filter function allows the reported standby current to shift towards the actual measured current with a time

constant of approximately 67 seconds. The value is reported with a resolution of 3.57 µV per bit. Use the

The host system has read-only access to this register pair.

This register pair reports calculated time-to-empty at the measured standby current value. This value is based

on the nominal available charge and the standby current. STTE is reported in minutes. STTE is calculated by:

STTE = 60 * NAC/SI

The host system has read-only access to this register pair.

The EDV1 threshold can be compensated for discharge rate and temperature. The compensated, or computed,

EDV1 threshold is displayed in this register pair. The CEDV display is only updated during discharge. There is a

floor set for the EDV1 threshold. The EDV1 threshold will be the greater of the computed CEDV threshold and

EDVF + 32 mV. CEDV is displayed in millivolts. The host system has read-only access to this register pair.

TTECP is the time-to-empty in minutes with a constant-power load. TTECP is equal to the TTE constant-current

value scaled to reflect a future drop in battery voltage that would cause the load current to increase. The

calculation assumes a linear voltage drop down to EDVF, yielding a conservative (smaller) run-time than

expected.

TTECP = TTE * (VOLT + EDVF) / (2 * VOLT)

The host system has read-only access to this register pair.

CYCL is the cycle count since the last learning cycle. Each count indicates an increment of CYCT since there

was a learning cycle. This register is cleared every time there is a learning cycle. When this count reaches 32, it

forces the CI flag in FLAGS to a 1. The host system has read-only access to this register pair.

CYCT is the cycle count since a full reset. A full reset clears this register. Each count indicates a cumulative

discharge equal to the Design Capacity (256 * ILMD). The host system has read-only access to this register pair.

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